{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T16:44:31Z","timestamp":1751388271932,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,10,3]],"date-time":"2022-10-03T00:00:00Z","timestamp":1664755200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,10,3]],"date-time":"2022-10-03T00:00:00Z","timestamp":1664755200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,10,3]]},"DOI":"10.1109\/vlsi-soc54400.2022.9939569","type":"proceedings-article","created":{"date-parts":[[2022,11,8]],"date-time":"2022-11-08T20:41:50Z","timestamp":1667940110000},"page":"1-6","source":"Crossref","is-referenced-by-count":5,"title":["Hardware Trojan Mitigation for Securing On-chip Networks from Dead Flit Attacks"],"prefix":"10.1109","author":[{"given":"Mohammad Humam","family":"Khan","sequence":"first","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,India"}]},{"given":"Ruchika","family":"Gupta","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,India"}]},{"given":"Vedika J.","family":"Kulkarni","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,India"}]},{"given":"John","family":"Jose","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,India"}]},{"given":"Sukumar","family":"Nandi","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,India"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2013.6653617"},{"key":"ref11","article-title":"Packet header attack by hardware trojan in noc based tcmp and its impact analysis","author":"jk","year":"2021","journal-title":"2021 15th IEEE ACM International Symposium on Networks on Chip (NOCS)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3477231.3490425"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS50636.2020.9241711"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2018.8512164"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/2024716.2024718","article-title":"The gem5 simulator","volume":"39","author":"binkert","year":"2011","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2017.08.007"},{"key":"ref4","article-title":"System-on-Chip Security: Validation and Verification","author":"farahmandi","year":"2019","journal-title":"Springer Nature"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2011.5955003"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593144"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCES.2015.7393075"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2018.00070"},{"key":"ref7","first-page":"1136","article-title":"Packet Security with Path Sensitization for NoCs","author":"travis boraten","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref2","first-page":"43","article-title":"Intel&#x00AE; xeon phi&#x2122; coprocessor - The Architecture","volume":"176","author":"chrysos","year":"2014","journal-title":"Intel Whitepaper"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1016\/j.procs.2017.05.139"}],"event":{"name":"2022 IFIP\/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2022,10,3]]},"location":"Patras, Greece","end":{"date-parts":[[2022,10,5]]}},"container-title":["2022 IFIP\/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9939277\/9939284\/09939569.pdf?arnumber=9939569","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,12,12]],"date-time":"2022-12-12T19:57:58Z","timestamp":1670875078000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9939569\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,3]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc54400.2022.9939569","relation":{},"subject":[],"published":{"date-parts":[[2022,10,3]]}}}