{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T02:17:21Z","timestamp":1781835441377,"version":"3.54.5"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,10,3]],"date-time":"2022-10-03T00:00:00Z","timestamp":1664755200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,10,3]],"date-time":"2022-10-03T00:00:00Z","timestamp":1664755200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100009224","name":"Advanced Research Projects Agency","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100009224","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,10,3]]},"DOI":"10.1109\/vlsi-soc54400.2022.9939623","type":"proceedings-article","created":{"date-parts":[[2022,11,8]],"date-time":"2022-11-08T20:41:50Z","timestamp":1667940110000},"page":"1-6","source":"Crossref","is-referenced-by-count":5,"title":["A Hardware-based HEFT Scheduler Implementation for Dynamic Workloads on Heterogeneous SoCs"],"prefix":"10.1109","author":[{"given":"Alexander","family":"Fusco","sequence":"first","affiliation":[{"name":"The University of Arizona,Electrical and Computer Engineering,Tucson,AZ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sahil","family":"Hassan","sequence":"additional","affiliation":[{"name":"The University of Arizona,Electrical and Computer Engineering,Tucson,AZ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Joshua","family":"Mack","sequence":"additional","affiliation":[{"name":"The University of Arizona,Electrical and Computer Engineering,Tucson,AZ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ali","family":"Akoglu","sequence":"additional","affiliation":[{"name":"The University of Arizona,Electrical and Computer Engineering,Tucson,AZ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/UBMK52708.2021.9558926"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3529257"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-018-2355-0"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2514.2516"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"1254","DOI":"10.1109\/TC.2014.2315637","article-title":"A Hardware Scheduler Based on Task Queues for FPGA-Based Embedded Real-Time Systems","volume":"64","author":"tang","year":"2015","journal-title":"IEEE Trans On Comput"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/71.993206"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2010.43"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2019.2952136"},{"key":"ref8","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4614-0676-1","author":"buttazzo","year":"2011","journal-title":"Hard Real-Time Computing Systems Predictable Scheduling Algorithms and Applications"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"83","DOI":"10.23919\/MIXDES49814.2020.9156070","article-title":"ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems","author":"koh\u00faka","year":"2020","journal-title":"2020 27th Int Conf on Mixed Design of Integr Circuits and Syst (MIXDES)"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2021.3135876"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.141"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1023\/A:1025120124771"}],"event":{"name":"2022 IFIP\/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","location":"Patras, Greece","start":{"date-parts":[[2022,10,3]]},"end":{"date-parts":[[2022,10,5]]}},"container-title":["2022 IFIP\/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9939277\/9939284\/09939623.pdf?arnumber=9939623","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,3,11]],"date-time":"2023-03-11T14:27:29Z","timestamp":1678544849000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9939623\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,3]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc54400.2022.9939623","relation":{},"subject":[],"published":{"date-parts":[[2022,10,3]]}}}