{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:44:28Z","timestamp":1730303068313,"version":"3.28.0"},"reference-count":33,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,10,3]],"date-time":"2022-10-03T00:00:00Z","timestamp":1664755200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,10,3]],"date-time":"2022-10-03T00:00:00Z","timestamp":1664755200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,10,3]]},"DOI":"10.1109\/vlsi-soc54400.2022.9939639","type":"proceedings-article","created":{"date-parts":[[2022,11,8]],"date-time":"2022-11-08T20:41:50Z","timestamp":1667940110000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Run Time Power and Accuracy Management with Approximate Circuits"],"prefix":"10.1109","author":[{"given":"Nahla","family":"Elaraby","sequence":"first","affiliation":[{"name":"TU Wien,Vienna,Austria"}]},{"given":"David","family":"Frismuth","sequence":"additional","affiliation":[{"name":"TU Wien,Vienna,Austria"}]},{"given":"Nilson Neves","family":"Filho","sequence":"additional","affiliation":[{"name":"UNESP,Brazil"}]},{"given":"Axel","family":"Jantsch","sequence":"additional","affiliation":[{"name":"TU Wien,Vienna,Austria"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2012.6416772"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2011.5735479"},{"key":"ref31","first-page":"12","article-title":"Design and implementation of a reliable ofdm baseband system based on fpga","volume":"36","year":"2019","journal-title":"Microelectronics and Computer"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/AHS.2018.8541479"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICRC.2016.7738674"},{"key":"ref11","first-page":"1","article-title":"Area-optimized low-latency approximate multipliers for fpga-based hardware accelerators","author":"ullah","year":"2018","journal-title":"Proceedings of the 55th Annual Design Automation Conference"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TENCON.2018.8650127"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2015.2505723"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-99322-5_2"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3131274"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1002\/cta.3074"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372600"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/IWSOC.2006.348260"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-018-0578-6"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2019.2945763"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-99322-5_16"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3462329"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898005"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-99322-5_21"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062333"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-99322-5_18"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2018.10.010"},{"article-title":"Low power digital image processing using approximate adders","year":"2014","author":"kumar","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2767858"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.13164\/re.2017.0623"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3012753"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MECO.2015.7181865"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2020.2981395"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/BEC.2014.7320558"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/GI52543.2021.00011"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CANDAR.2016.0070"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8350947"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218533"}],"event":{"name":"2022 IFIP\/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2022,10,3]]},"location":"Patras, Greece","end":{"date-parts":[[2022,10,5]]}},"container-title":["2022 IFIP\/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9939277\/9939284\/09939639.pdf?arnumber=9939639","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,28]],"date-time":"2022-11-28T20:22:04Z","timestamp":1669666924000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9939639\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,10,3]]},"references-count":33,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc54400.2022.9939639","relation":{},"subject":[],"published":{"date-parts":[[2022,10,3]]}}}