{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T11:31:39Z","timestamp":1763724699237,"version":"3.28.0"},"reference-count":32,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,10,16]],"date-time":"2023-10-16T00:00:00Z","timestamp":1697414400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,10,16]],"date-time":"2023-10-16T00:00:00Z","timestamp":1697414400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,10,16]]},"DOI":"10.1109\/vlsi-soc57769.2023.10321853","type":"proceedings-article","created":{"date-parts":[[2023,11,22]],"date-time":"2023-11-22T19:06:55Z","timestamp":1700680015000},"page":"1-6","source":"Crossref","is-referenced-by-count":7,"title":["Synthesis of SFQ Circuits with Compound Gates"],"prefix":"10.1109","author":[{"given":"Rassul","family":"Bairamkulov","sequence":"first","affiliation":[{"name":"EPFL,Integrated Systems Laboratory,Lausanne,Switzerland"}]},{"given":"Alessandro Tempia","family":"Calvino","sequence":"additional","affiliation":[{"name":"EPFL,Integrated Systems Laboratory,Lausanne,Switzerland"}]},{"given":"Giovanni","family":"De Micheli","sequence":"additional","affiliation":[{"name":"EPFL,Integrated Systems Laboratory,Lausanne,Switzerland"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1515\/9783110862393.1103"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISEC.2015.7383439"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.2011.5973407"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2022.3206280"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/77.783712"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1063\/1.1473687"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1088\/0953-2048\/19\/5\/s33"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2013.2244634"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1142\/S012915640100085X"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-76885-0"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2018.2880343"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/tasc.2021.3129719"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3123141"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3412389"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2020.3007175"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2020.3004888"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2019.2896137"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2022.3161052"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/3583781.3590287"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH53687.2021.9642241"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203799"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC52403.2022.9712552"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.1987.1064951"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342027"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586331"},{"article-title":"The EPFL Combinational Benchmark Suite","volume-title":"Proc. IWLS","author":"Amar\u00fa","key":"ref26"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/54.785838"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/3566097.3567895"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/BF01759032"},{"article-title":"The EPFL Logic Synthesis Libraries","year":"2018","author":"Soeken","key":"ref30"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/264995.264996"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1016\/S0921-4534(02)01759-8"}],"event":{"name":"2023 IFIP\/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2023,10,16]]},"location":"Dubai, United Arab Emirates","end":{"date-parts":[[2023,10,18]]}},"container-title":["2023 IFIP\/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10321814\/10321836\/10321853.pdf?arnumber=10321853","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,2]],"date-time":"2024-03-02T21:04:10Z","timestamp":1709413450000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10321853\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,10,16]]},"references-count":32,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc57769.2023.10321853","relation":{},"subject":[],"published":{"date-parts":[[2023,10,16]]}}}