{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,12]],"date-time":"2025-12-12T13:49:08Z","timestamp":1765547348221,"version":"3.32.0"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,10,6]],"date-time":"2024-10-06T00:00:00Z","timestamp":1728172800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,10,6]],"date-time":"2024-10-06T00:00:00Z","timestamp":1728172800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100011033","name":"Spanish State Research Agency","doi-asserted-by":"publisher","award":["PID2020-114110RA-100,PDC2023-145838-100"],"award-info":[{"award-number":["PID2020-114110RA-100,PDC2023-145838-100"]}],"id":[{"id":"10.13039\/501100011033","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,10,6]]},"DOI":"10.1109\/vlsi-soc62099.2024.10767801","type":"proceedings-article","created":{"date-parts":[[2024,12,3]],"date-time":"2024-12-03T18:53:02Z","timestamp":1733251982000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["Compensating the Load Effect in Quadrature All-Pass Filters"],"prefix":"10.1109","author":[{"given":"U. Esteban","family":"Eraso","sequence":"first","affiliation":[{"name":"Aragon Institute of Engineering Research (I3A),Group of Electronic Desing (GDE),Zaragoza,Spain"}]},{"given":"C.","family":"S\u00e1nchez-Azqueta","sequence":"additional","affiliation":[{"name":"Aragon Institute of Engineering Research (I3A),Group of Electronic Desing (GDE),Zaragoza,Spain"}]},{"given":"F.","family":"Aznar","sequence":"additional","affiliation":[{"name":"Aragon Institute of Engineering Research (I3A),Group of Electronic Desing (GDE),Zaragoza,Spain"}]},{"given":"C.","family":"Aldea","sequence":"additional","affiliation":[{"name":"Aragon Institute of Engineering Research (I3A),Group of Electronic Desing (GDE),Zaragoza,Spain"}]},{"given":"S.","family":"Celma","sequence":"additional","affiliation":[{"name":"Aragon Institute of Engineering Research (I3A),Group of Electronic Desing (GDE),Zaragoza,Spain"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/LMWC.2018.2837885"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/COMCAS.2017.8244740"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1088\/1674-4926\/36\/1\/015002"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/RFIT54256.2022.9882510"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2012.2212027"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.3390\/electronics12132862"},{"volume-title":"Integrated 60 GHz RF Beamforming in CMOS","author":"Yu","key":"ref7"}],"event":{"name":"2024 IFIP\/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2024,10,6]]},"location":"Tanger, Morocco","end":{"date-parts":[[2024,10,9]]}},"container-title":["2024 IFIP\/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10767775\/10767782\/10767801.pdf?arnumber=10767801","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,10]],"date-time":"2025-01-10T19:55:32Z","timestamp":1736538932000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10767801\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,6]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc62099.2024.10767801","relation":{},"subject":[],"published":{"date-parts":[[2024,10,6]]}}}