{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,11]],"date-time":"2025-01-11T05:33:34Z","timestamp":1736573614862,"version":"3.32.0"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,10,6]],"date-time":"2024-10-06T00:00:00Z","timestamp":1728172800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,10,6]],"date-time":"2024-10-06T00:00:00Z","timestamp":1728172800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,10,6]]},"DOI":"10.1109\/vlsi-soc62099.2024.10767816","type":"proceedings-article","created":{"date-parts":[[2024,12,3]],"date-time":"2024-12-03T18:53:02Z","timestamp":1733251982000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["High-Density Standard Cell Library for Sequential 3D Integrated Circuits"],"prefix":"10.1109","author":[{"given":"Arturo","family":"Prieto","sequence":"first","affiliation":[{"name":"Lund University,Department of Electrical and Information Technology,Lund,Sweden,22100"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Joachim","family":"Rodrigues","sequence":"additional","affiliation":[{"name":"Lund University,Department of Electrical and Information Technology,Lund,Sweden,22100"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722210"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICECS.2018.8617955"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2015.102"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45741.2023.10413807"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2768330"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116293"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/iscas51556.2021.9401685"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MOCAST52088.2021.9493347"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993493"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45741.2023.10413864"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2010.5751465"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/5.920580"}],"event":{"name":"2024 IFIP\/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)","start":{"date-parts":[[2024,10,6]]},"location":"Tanger, Morocco","end":{"date-parts":[[2024,10,9]]}},"container-title":["2024 IFIP\/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10767775\/10767782\/10767816.pdf?arnumber=10767816","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,10]],"date-time":"2025-01-10T19:55:03Z","timestamp":1736538903000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10767816\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,6]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/vlsi-soc62099.2024.10767816","relation":{},"subject":[],"published":{"date-parts":[[2024,10,6]]}}}