{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,27]],"date-time":"2025-11-27T06:34:57Z","timestamp":1764225297339,"version":"3.28.0"},"reference-count":5,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,6]]},"DOI":"10.1109\/vlsic.2015.7231320","type":"proceedings-article","created":{"date-parts":[[2015,9,3]],"date-time":"2015-09-03T17:50:20Z","timestamp":1441302620000},"page":"C352-C353","source":"Crossref","is-referenced-by-count":6,"title":["A 2.8mW\/Gb\/s 14Gb\/s serial link transceiver in 65nm CMOS"],"prefix":"10.1109","author":[{"given":"Saurabh","family":"Saxena","sequence":"first","affiliation":[]},{"given":"Guanghua","family":"Shu","sequence":"additional","affiliation":[]},{"given":"Romesh Kumar","family":"Nandwana","sequence":"additional","affiliation":[]},{"given":"Mrunmay","family":"Talegaonkar","sequence":"additional","affiliation":[]},{"given":"Ahmed","family":"Elkholy","sequence":"additional","affiliation":[]},{"given":"Tejasvi","family":"Anand","sequence":"additional","affiliation":[]},{"given":"Seong Joong","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Woo-Seok","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Pavan Kumar","family":"Hanumolu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","volume":"46","author":"yin","year":"2011","journal-title":"JSSC"},{"key":"ref3","volume":"48","author":"raghavan","year":"2013","journal-title":"JSSC"},{"key":"ref5","first-page":"438","author":"balan","year":"2014","journal-title":"ISSCC Digest"},{"key":"ref2","volume":"48","author":"jung","year":"2013","journal-title":"JSSC"},{"key":"ref1","volume":"48","author":"lu","year":"2013","journal-title":"JSSC"}],"event":{"name":"2015 Symposium on VLSI Circuits","start":{"date-parts":[[2015,6,17]]},"location":"Kyoto, Japan","end":{"date-parts":[[2015,6,19]]}},"container-title":["2015 Symposium on VLSI Circuits (VLSI Circuits)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7196579\/7231231\/07231320.pdf?arnumber=7231320","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T17:10:37Z","timestamp":1490375437000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7231320\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,6]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/vlsic.2015.7231320","relation":{},"subject":[],"published":{"date-parts":[[2015,6]]}}}