{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T05:23:38Z","timestamp":1725600218306},"reference-count":3,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,6]]},"DOI":"10.1109\/vlsic.2015.7231346","type":"proceedings-article","created":{"date-parts":[[2015,9,3]],"date-time":"2015-09-03T21:50:20Z","timestamp":1441317020000},"page":"C118-C119","source":"Crossref","is-referenced-by-count":8,"title":["56Gb\/s PAM4 and NRZ SerDes transceivers in 40nm CMOS"],"prefix":"10.1109","author":[{"given":"Jri","family":"Lee","sequence":"first","affiliation":[]},{"given":"Ping-Chuan","family":"Chiang","sequence":"additional","affiliation":[]},{"given":"Chih-Chi","family":"Weng","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"JSSC","year":"2008","author":"lee","key":"ref3"},{"journal-title":"ISSCC","year":"2009","author":"lee","key":"ref2"},{"journal-title":"ISSCC","year":"2014","author":"chiang","key":"ref1"}],"event":{"name":"2015 Symposium on VLSI Circuits","start":{"date-parts":[[2015,6,17]]},"location":"Kyoto, Japan","end":{"date-parts":[[2015,6,19]]}},"container-title":["2015 Symposium on VLSI Circuits (VLSI Circuits)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7196579\/7231231\/07231346.pdf?arnumber=7231346","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T05:33:07Z","timestamp":1490419987000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7231346\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,6]]},"references-count":3,"URL":"https:\/\/doi.org\/10.1109\/vlsic.2015.7231346","relation":{},"subject":[],"published":{"date-parts":[[2015,6]]}}}