{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,20]],"date-time":"2025-12-20T22:15:17Z","timestamp":1766268917820},"reference-count":5,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,6]]},"DOI":"10.1109\/vlsic.2018.8502260","type":"proceedings-article","created":{"date-parts":[[2018,11,15]],"date-time":"2018-11-15T22:04:38Z","timestamp":1542319478000},"page":"79-80","source":"Crossref","is-referenced-by-count":16,"title":["Logic Process Compatible 40NM 16MB, Embedded Perpendicular-MRAM with Hybrid-Resistance Reference, Sub-\u03bcA Sensing Resolution, and 17.5NS Read Access Time"],"prefix":"10.1109","author":[{"given":"Yi-Chun","family":"Shih","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chia-Fu","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yen-An","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Po-Hao","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hon-Jarn","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu-Lin","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ku-Feng","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ta-Ching","family":"Yeh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hung-Chang","family":"Yu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Harry","family":"Chuang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu-Der","family":"Chih","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jonathan","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"ISSCC","year":"2013","author":"yu","key":"ref4"},{"journal-title":"TCAS-I","year":"2014","key":"ref3"},{"journal-title":"VLSI","year":"2016","author":"shih","key":"ref5"},{"journal-title":"ISSCC","year":"2017","key":"ref2"},{"journal-title":"IEDM","year":"2017","author":"wang","key":"ref1"}],"event":{"name":"2018 IEEE Symposium on VLSI Circuits","start":{"date-parts":[[2018,6,18]]},"location":"Honolulu, HI","end":{"date-parts":[[2018,6,22]]}},"container-title":["2018 IEEE Symposium on VLSI Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8484863\/8502213\/08502260.pdf?arnumber=8502260","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T01:34:52Z","timestamp":1598232892000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8502260\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,6]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/vlsic.2018.8502260","relation":{},"subject":[],"published":{"date-parts":[[2018,6]]}}}