{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T16:14:49Z","timestamp":1781885689982,"version":"3.54.5"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,6]]},"DOI":"10.1109\/vlsic.2018.8502333","type":"proceedings-article","created":{"date-parts":[[2018,11,16]],"date-time":"2018-11-16T03:04:38Z","timestamp":1542337478000},"page":"39-40","source":"Crossref","is-referenced-by-count":21,"title":["2.9TOPS\/W Reconfigurable Dense\/Sparse Matrix-Multiply Accelerator with Unified INT8\/INTI6\/FP16 Datapath in 14NM Tri-Gate CMOS"],"prefix":"10.1109","author":[{"given":"Mark","family":"Anders","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Himanshu","family":"Kaul","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sanu","family":"Mathew","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Vikram","family":"Suresh","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sudhir","family":"Satpathy","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Amit","family":"Agarwal","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Steven","family":"Hsu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ram","family":"Krishnamurthy","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","author":"chen","year":"2017","journal-title":"JSSC"},{"key":"ref3","author":"han","year":"2016","journal-title":"ISCA"},{"key":"ref10","author":"jan","year":"2015","journal-title":"VLSI Tech Symp"},{"key":"ref6","author":"shin","year":"2017","journal-title":"ISSCC"},{"key":"ref5","author":"bang","year":"2017","journal-title":"ISSCC"},{"key":"ref8","author":"jouppi","year":"2017","journal-title":"ISCA"},{"key":"ref7","author":"bong","year":"2017","journal-title":"ISSCC"},{"key":"ref2","author":"dorrance","year":"2016","journal-title":"VLSIC"},{"key":"ref9","author":"koster","year":"2017","journal-title":"ISCA"},{"key":"ref1","author":"moons","year":"2016","journal-title":"VLSIC"}],"event":{"name":"2018 IEEE Symposium on VLSI Circuits","location":"Honolulu, HI","start":{"date-parts":[[2018,6,18]]},"end":{"date-parts":[[2018,6,22]]}},"container-title":["2018 IEEE Symposium on VLSI Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8484863\/8502213\/08502333.pdf?arnumber=8502333","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T00:17:04Z","timestamp":1598228224000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8502333\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,6]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/vlsic.2018.8502333","relation":{},"subject":[],"published":{"date-parts":[[2018,6]]}}}