{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T06:35:46Z","timestamp":1773815746197,"version":"3.50.1"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T00:00:00Z","timestamp":1767398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T00:00:00Z","timestamp":1767398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100008628","name":"Ministry of Electronics and Information Technology (MeitY), Government of India (GoI), under vide Sanction Order","doi-asserted-by":"publisher","award":["EE-9\/2\/2021-R & D-E"],"award-info":[{"award-number":["EE-9\/2\/2021-R & D-E"]}],"id":[{"id":"10.13039\/501100008628","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,1,3]]},"DOI":"10.1109\/vlsid68508.2026.00027","type":"proceedings-article","created":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T20:19:04Z","timestamp":1773778744000},"page":"73-78","source":"Crossref","is-referenced-by-count":0,"title":["ASIC Design for a Hybrid Approximate Floating-Point Adder with Enhanced Carry Prediction Logic"],"prefix":"10.1109","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-1298-6399","authenticated-orcid":false,"given":"Sridhar","family":"C","sequence":"first","affiliation":[{"name":"National Institute of Technology Puducherry,VEDIC Laboratory,Department of Electronics and Communication Engineering,Karaikal,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3674-2968","authenticated-orcid":false,"given":"Aniruddha","family":"Kanhe","sequence":"additional","affiliation":[{"name":"National Institute of Technology Puducherry,VEDIC Laboratory,Department of Electronics and Communication Engineering,Karaikal,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1002\/cta.2831"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"102940","DOI":"10.1016\/j.micpro.2019.102940","article-title":"Design of Approximate Adders and Multipliers for Error Tolerant Image Processing","volume":"72","author":"Anusha","year":"2020","journal-title":"Microprocessors and Microsystems"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2179038"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.2019.00071"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2018.2870273"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3077669"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1007\/s00034-024-02760-9"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2016.2633307"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2901060"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2027626"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TENCON.2018.8650127"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2822278"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2012.6489164"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.3390\/electronics8111212"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.3390\/electronics9030471"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3108443"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JRPROC.1961.287779"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ieeestd.1985.82928"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/s13369-021-05455-4"},{"key":"ref20","article-title":"AudioMNIST: Exploring Explainable Artificial Intelligence for Audio Analysis on a Simple Benchmark","author":"Becker","year":"2023","journal-title":"arXiv"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2021.3107370"}],"event":{"name":"2026 39th International Conference on VLSI Design &amp; 25th International Conference on Embedded Systems (VLSID)","location":"Pune, India","start":{"date-parts":[[2026,1,3]]},"end":{"date-parts":[[2026,1,7]]}},"container-title":["2026 39th International Conference on VLSI Design &amp;amp; 25th International Conference on Embedded Systems (VLSID)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11433189\/11433171\/11433321.pdf?arnumber=11433321","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T05:39:16Z","timestamp":1773812356000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11433321\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1,3]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/vlsid68508.2026.00027","relation":{},"subject":[],"published":{"date-parts":[[2026,1,3]]}}}