{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T06:18:32Z","timestamp":1773814712921,"version":"3.50.1"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T00:00:00Z","timestamp":1767398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T00:00:00Z","timestamp":1767398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,1,3]]},"DOI":"10.1109\/vlsid68508.2026.00089","type":"proceedings-article","created":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T20:19:04Z","timestamp":1773778744000},"page":"443-448","source":"Crossref","is-referenced-by-count":0,"title":["A Novel Latch Reset Technique Enabling Sub- $6 \\mu ~\\mathrm{W}$ Operation in Double-Tail Comparator"],"prefix":"10.1109","author":[{"given":"Aditya","family":"Dubey","sequence":"first","affiliation":[{"name":"Indian Institute of Technology Bhubaneswar,Odisha,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sunil","family":"Rathore","sequence":"additional","affiliation":[{"name":"Manipal Institute of Technology, Manipal Academy of Higher Education (MAHE),Department of ECE,Manipal,Karnataka,India,576104"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Navjeet","family":"Bagga","sequence":"additional","affiliation":[{"name":"Manipal Institute of Technology, Manipal Academy of Higher Education (MAHE),Department of ECE,Manipal,Karnataka,India,576104"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2820147"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isvlsi.2019.00040"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/lwc.2018.2831683"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/s11277-024-10971-1"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ecce44975.2020.9236045"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2006.875308"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/mssc.2015.2418155"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/isqed60706.2024.10528368"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/isqed60706.2024.10528368"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/tvlsi.2013.2241799"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/tcsii.2020.2993064"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1049\/el.2014.3272"}],"event":{"name":"2026 39th International Conference on VLSI Design &amp; 25th International Conference on Embedded Systems (VLSID)","location":"Pune, India","start":{"date-parts":[[2026,1,3]]},"end":{"date-parts":[[2026,1,7]]}},"container-title":["2026 39th International Conference on VLSI Design &amp;amp; 25th International Conference on Embedded Systems (VLSID)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11433189\/11433171\/11433265.pdf?arnumber=11433265","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T05:24:46Z","timestamp":1773811486000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11433265\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1,3]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/vlsid68508.2026.00089","relation":{},"subject":[],"published":{"date-parts":[[2026,1,3]]}}}