{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,19]],"date-time":"2026-03-19T01:12:32Z","timestamp":1773882752700,"version":"3.50.1"},"reference-count":22,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T00:00:00Z","timestamp":1767398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,1,3]],"date-time":"2026-01-03T00:00:00Z","timestamp":1767398400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,1,3]]},"DOI":"10.1109\/vlsid68508.2026.00098","type":"proceedings-article","created":{"date-parts":[[2026,3,17]],"date-time":"2026-03-17T20:19:04Z","timestamp":1773778744000},"page":"496-500","source":"Crossref","is-referenced-by-count":0,"title":["A Partially Loop-Unrolled Noise-Shaping SAR ADC Achieving 57dB-SNDR in 40MHz-BW at 320MS\/s in 18nm FD-SOI CMOS Technology"],"prefix":"10.1109","author":[{"given":"Anamika","family":"Sharma","sequence":"first","affiliation":[{"name":"STMicroelectronics,Greater Noida,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luv","family":"Pandey","sequence":"additional","affiliation":[{"name":"STMicroelectronics,Greater Noida,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Paras","family":"Garg","sequence":"additional","affiliation":[{"name":"STMicroelectronics,Greater Noida,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rajesh","family":"Zele","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Electrical Engineering,Bombay,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3006149"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2015.2453332"},{"key":"ref3","article-title":"A 90-MS\/s 11-MHz-Bandwidth 62dB SNDR Noise-Shaping SAR ADC","volume-title":"IEEE JSSC","author":"Fredenburg","year":"2012"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/vlsic.2015.7231329"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIC.2017.8008491"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870463"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3137540"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS58744.2024.10558220"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2871081"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/OJSSCS.2021.3119910"},{"key":"ref11","article-title":"A 10b $100 \\text{MS} \/ \\mathrm{s} 1.13 \\text{mW}$ SAR ADC with Binary-Scaled Error Compensation","author":"Liu","year":"2010","journal-title":"IEEE ISSCC"},{"key":"ref12","doi-asserted-by":"crossref","DOI":"10.1109\/JSSC.2012.2204543","article-title":"Single-Channel, 1.25 -GS\/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS Digital error correction","volume-title":"JSSC","author":"Jing","year":"2012"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2014.6942061"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662299"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2900150"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/4.643647"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2018.8624092"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CIRSYSSIM.2018.8525985"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS56072.2025.11043207"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-DAT.2017.7939661"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/PRIME61930.2024.10559683"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2582861"}],"event":{"name":"2026 39th International Conference on VLSI Design &amp; 25th International Conference on Embedded Systems (VLSID)","location":"Pune, India","start":{"date-parts":[[2026,1,3]]},"end":{"date-parts":[[2026,1,7]]}},"container-title":["2026 39th International Conference on VLSI Design &amp;amp; 25th International Conference on Embedded Systems (VLSID)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11433189\/11433171\/11433175.pdf?arnumber=11433175","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,3,18]],"date-time":"2026-03-18T19:37:22Z","timestamp":1773862642000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11433175\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,1,3]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/vlsid68508.2026.00098","relation":{},"subject":[],"published":{"date-parts":[[2026,1,3]]}}}