{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,28]],"date-time":"2025-11-28T12:10:57Z","timestamp":1764331857673,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,9]]},"DOI":"10.1109\/vlsisoc.2010.5642678","type":"proceedings-article","created":{"date-parts":[[2010,11,30]],"date-time":"2010-11-30T16:36:29Z","timestamp":1291134989000},"page":"304-309","source":"Crossref","is-referenced-by-count":12,"title":["A low-power, high-speed DCT architecture for image compression: Principle and implementation"],"prefix":"10.1109","author":[{"given":"M.","family":"Jridi","sequence":"first","affiliation":[]},{"given":"A.","family":"Alfalou","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"1805","article-title":"New 2n DCT algorithm suitable for VLSI implementation","author":"duhamel","year":"1987","journal-title":"IEEE ICAPSS"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1961.5219227"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TASSP.1980.1163450"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/82.539000"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"245","DOI":"10.1049\/ip-vis:20030564","article-title":"Low-Power data-dependant 8&#x00D7;8 DCT\/IDCT for video compression","volume":"150","author":"pai","year":"2003","journal-title":"IEE Proceedings Vision Image and Signal Processing"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/76.143413"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/12.954513"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/53.29648"},{"journal-title":"Discrete Cosine Transform Algorithms Advantages Applications","year":"1990","author":"rao","key":"ref18"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.sigpro.2006.06.011"},{"journal-title":"Digital compression and coding of continuous tone still image","year":"1992","key":"ref4"},{"key":"ref3","first-page":"131","article-title":"An Evaluation of the Suitability of FPGAs for Embedded Vision Systems","author":"james","year":"2005","journal-title":"CVPR '05 Proceedings of the 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"78","DOI":"10.1109\/38.219457","author":"blinn","year":"1993","journal-title":"IEEE Computer Graphics and Applications"},{"journal-title":"Coding of moving picture and associated audio","year":"1990","key":"ref5"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1364\/AOP.1.000589"},{"key":"ref7","first-page":"74860j-1","article-title":"A new simultaneous compression and encryption method for images suitable to optical correlation, Optics and Photonics for Counterterrorism and Crime Fighting V","volume":"7486","author":"alfalou","year":"2009","journal-title":"Proc of SPIE"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.898281"},{"journal-title":"Reconfigurable Computing The Theory and Practice of FPGA-Based Computation","year":"2008","author":"hauck","key":"ref1"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.1989.266596"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IST.2010.5548546"},{"key":"ref22","first-page":"76","article-title":"200 MHz video compression macrocelles using low-swing differential logic","author":"matsui","year":"1994","journal-title":"Proceedings of ISSCC"},{"key":"ref21","first-page":"7","article-title":"A high-speed FIR digital filter with CSD coefficients implemented on FPGA","author":"mitsuru","year":"2001","journal-title":"Proceedings of the 2001 Asia and South Pacific Design Automation Conference"},{"journal-title":"Low Power Data-Dependent Transform Video and Still Image Coding","year":"1999","author":"xanthopoulos","key":"ref23"}],"event":{"name":"2010 18th IEEE\/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC)","start":{"date-parts":[[2010,9,27]]},"location":"Madrid, Spain","end":{"date-parts":[[2010,9,29]]}},"container-title":["2010 18th IEEE\/IFIP International Conference on VLSI and System-on-Chip"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5629484\/5642591\/05642678.pdf?arnumber=5642678","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T12:42:37Z","timestamp":1497876157000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5642678\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,9]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/vlsisoc.2010.5642678","relation":{},"subject":[],"published":{"date-parts":[[2010,9]]}}}