{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,6]],"date-time":"2025-11-06T18:57:50Z","timestamp":1762455470450,"version":"build-2065373602"},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,6,12]],"date-time":"2022-06-12T00:00:00Z","timestamp":1654992000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,6,12]],"date-time":"2022-06-12T00:00:00Z","timestamp":1654992000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,6,12]]},"DOI":"10.1109\/vlsitechnologyandcir46769.2022.9830184","type":"proceedings-article","created":{"date-parts":[[2022,7,22]],"date-time":"2022-07-22T12:42:52Z","timestamp":1658493772000},"page":"369-370","source":"Crossref","is-referenced-by-count":0,"title":["Comprehensive Feasibility Study of Single FIN Transistors for Scaling Both Switching Energy and Device Footprint"],"prefix":"10.1109","author":[{"given":"H.","family":"Fukutome","sequence":"first","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"K.","family":"Suh","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"W.","family":"Kim","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"Y.","family":"Moriyama","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"S.","family":"Kang","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"B.","family":"Eom","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"J.","family":"Kim","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"C.","family":"Yoon","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"W.","family":"Kwon","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"Y.","family":"Chung","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"Y.","family":"Nam","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"Y.","family":"Kim","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"S.","family":"Park","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"J.","family":"Park","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"H. -J.","family":"Cho","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"K.","family":"Rim","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]},{"given":"S. D.","family":"Kwon","sequence":"additional","affiliation":[{"name":"Samsung Electronics Co., Ltd,Semiconductor R&#x0026;D Center,Hwaseong,Korea"}]}],"member":"263","reference":[{"journal-title":"2020 Symp VLSI","year":"0","author":"deng","key":"ref4"},{"journal-title":"Symp VLSI 2018","year":"0","author":"jeong","key":"ref3"},{"journal-title":"IEEE ICECS-2015","year":"0","author":"abdelkader","key":"ref10"},{"key":"ref6","first-page":"36.7","author":"yeap","year":"0","journal-title":"IEDM 2019"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2677978"},{"key":"ref5","first-page":"2.6","author":"wu","year":"0","journal-title":"IEDM 2016"},{"key":"ref8","first-page":"20.1","author":"jeong","year":"0","journal-title":"IEDM 2020"},{"key":"ref7","first-page":"36.3","author":"wu","year":"0","journal-title":"IEDM 2019"},{"key":"ref2","first-page":"1.1","author":"liu","year":"2021","journal-title":"ISSCC"},{"key":"ref9","first-page":"13.3","author":"masuoka","year":"0","journal-title":"IEDM 2021"},{"key":"ref1","article-title":"Advanced CMOS device technology","author":"post","year":"0","journal-title":"2013 VLSIT"}],"event":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","start":{"date-parts":[[2022,6,12]]},"location":"Honolulu, HI, USA","end":{"date-parts":[[2022,6,17]]}},"container-title":["2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9830116\/9830138\/09830184.pdf?arnumber=9830184","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,6]],"date-time":"2025-11-06T18:51:13Z","timestamp":1762455073000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9830184\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,12]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/vlsitechnologyandcir46769.2022.9830184","relation":{},"subject":[],"published":{"date-parts":[[2022,6,12]]}}}