{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:58:49Z","timestamp":1759147129268},"reference-count":16,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/vtest.2003.1197627","type":"proceedings-article","created":{"date-parts":[[2003,10,31]],"date-time":"2003-10-31T09:39:17Z","timestamp":1067593157000},"page":"9-14","source":"Crossref","is-referenced-by-count":44,"title":["A reconfigurable shared scan-in architecture"],"prefix":"10.1109","author":[{"given":"S.","family":"Samaranayake","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"E.","family":"Gizdarski","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"N.","family":"Sitchinava","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"F.","family":"Neuveux","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.","family":"Kapur","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.W.","family":"Williams","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"814","article-title":"A Methodology to Design Efficient BIST Test Pattern Generators","author":"chen","year":"1995","journal-title":"Proc IEEE Int Test Conf"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1997.639634"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2000.843867"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2002.1181710"},{"key":"ref14","first-page":"102","article-title":"VLSI Self-Testing Based on Syndrome Techniques","author":"barzilai","year":"1981","journal-title":"Proc of the IEEE Int Test Conf"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1984.1676477"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743172"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2002.1039519"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2002.1011104"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378388"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/12.364534"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1033794"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2001.990304"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1999.781060"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/288548.288563"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041773"}],"event":{"name":"21st VLSI Test Symposium (VTS 03)","acronym":"VTEST-03","location":"Napa, CA, USA"},"container-title":["Proceedings. 21st VLSI Test Symposium, 2003."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8533\/26948\/01197627.pdf?arnumber=1197627","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T18:01:53Z","timestamp":1489428113000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1197627\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/vtest.2003.1197627","relation":{},"subject":[]}}