{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:34:36Z","timestamp":1729665276937,"version":"3.28.0"},"reference-count":25,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/vts.2011.5783727","type":"proceedings-article","created":{"date-parts":[[2011,6,7]],"date-time":"2011-06-07T20:35:25Z","timestamp":1307478925000},"page":"235-240","source":"Crossref","is-referenced-by-count":7,"title":["Exponent monitoring for low-cost concurrent error detection in FPU control logic"],"prefix":"10.1109","author":[{"given":"Michail","family":"Maniatakos","sequence":"first","affiliation":[]},{"given":"Yiorgos","family":"Makris","sequence":"additional","affiliation":[]},{"given":"Prabhakar","family":"Kudva","sequence":"additional","affiliation":[]},{"given":"Bruce","family":"Fleischer","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/12.862218"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/43.125100"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1147\/rd.145.0563"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1973.5009108"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"9","DOI":"10.1109\/T-C.1974.223772","article-title":"floating-point arithmetic algorithms in the symmetric residue number system","volume":"c 23","author":"kinoshita","year":"1974","journal-title":"IEEE Transactions on Computers"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1968.226466"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1973.223705"},{"key":"ref17","doi-asserted-by":"crossref","first-page":"1312","DOI":"10.1109\/T-C.1971.223133","article-title":"the star (self-testing and repairing) computer: an investigation of the theory and practice of fault-tolerant computer design","volume":"c 20","author":"avizienis","year":"1971","journal-title":"IEEE Transactions on Computers"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(61)80037-5"},{"key":"ref19","first-page":"179","article-title":"Design of self-checking checkers for Berger codes","volume":"8","author":"marouf","year":"1978","journal-title":"IEEE International Symposium on Fault-tolerant Computing"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1994.315650"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.14"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2009.22"},{"key":"ref5","first-page":"173","article-title":"1 GHz HAL SPARC64R Dual Floating Point Unit with RAS features","author":"naini","year":"2001","journal-title":"IEEE Symposium on Computer Arithmetic"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EUC.2008.108"},{"key":"ref7","first-page":"400","article-title":"Reliable floating-point arithmetic algorithms for error coded operands","author":"lo","year":"1994","journal-title":"IEEE Transactions on Computers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743195"},{"year":"1996","key":"ref9","article-title":"TSC692E Floating-point Unit User's Manual for Embedded Real Time 32 bit Computer (ERC32)"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"669","DOI":"10.1109\/PROC.1986.13530","article-title":"soft-error filtering: a solution to the reliability problem of future vlsi digital circuits","volume":"74","author":"savaria","year":"1986","journal-title":"Proceedings of the IEEE"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/43.21840"},{"year":"0","key":"ref22","article-title":"OpenSPARC T1 specifications"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/103162.103163"},{"key":"ref24","first-page":"9","article-title":"IEEE standard for binary floating point arithmetic","volume":"22","author":"stevenson","year":"1987","journal-title":"ACM SIGPLAN Notices"},{"year":"2006","key":"ref23","article-title":"OpenSPARC T1 Microarchitecture Specification"},{"key":"ref25","article-title":"Instruction-level impact analysis of low-level faults in a modern microprocessor controller","author":"maniatakos","year":"2010","journal-title":"IEEE Transactions on Computers (TCOMP)"}],"event":{"name":"2011 IEEE VLSI Test Symposium (VTS)","start":{"date-parts":[[2011,5,1]]},"location":"Dana Point, CA, USA","end":{"date-parts":[[2011,5,5]]}},"container-title":["29th VLSI Test Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5772241\/5783722\/05783727.pdf?arnumber=5783727","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T01:16:09Z","timestamp":1497921369000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5783727\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/vts.2011.5783727","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}