{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:38:07Z","timestamp":1729661887081,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/vts.2011.5783729","type":"proceedings-article","created":{"date-parts":[[2011,6,7]],"date-time":"2011-06-07T16:35:25Z","timestamp":1307464525000},"page":"248-253","source":"Crossref","is-referenced-by-count":12,"title":["Dynamic scan clock control for test time reduction maintaining peak power limit"],"prefix":"10.1109","author":[{"given":"Priyadharshini","family":"Shanmugasundaram","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vishwani D.","family":"Agrawal","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"673","article-title":"Reduction of SoC Test Data Volume, Scan Power and Testing Time Using Alternating Run-Length Codes","author":"chandra","year":"2002","journal-title":"Proc Int Conf Computer Aided Design"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2001.923416"},{"key":"ref12","first-page":"489","article-title":"Test Time Reduction in Scan Designed Circuits","author":"lai","year":"1993","journal-title":"Proc European Des Automation Conf"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1995.512126"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"1128","DOI":"10.1109\/43.406714","article-title":"Test Application Time Reduction for Sequential Circuits with Scan","volume":"14","author":"lee","year":"1995","journal-title":"IEEE Trans CAD"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1992.279405"},{"key":"ref16","first-page":"1065","article-title":"An Almost Fullscan BIST Solution &#x2013; Higher Fault Coverage and Shorter Test Application Time","author":"tsai","year":"1998","journal-title":"Proc Int Test Conf"},{"journal-title":"Test Time Optimization in Scan Circuits","year":"2010","author":"shanmugasundaram","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/SSST.2011.5753813"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2000.843824"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/43.736572"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2002.1003802"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2004.1347657"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378388"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2003.1244945"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2003.1197641"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1386971"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041773"},{"journal-title":"Essentials of Electronic Testing for Digital Memory and Mixed-Signal VLSI Circuits","year":"2000","author":"bushnell","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805617"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9781139166980"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2004.1339513"},{"journal-title":"A Designer's Guide to Built-In Self-Test","year":"2002","author":"stroud","key":"ref24"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/54.199807"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/DTIS.2006.1708693"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"}],"event":{"name":"2011 IEEE VLSI Test Symposium (VTS)","start":{"date-parts":[[2011,5,1]]},"location":"Dana Point, CA, USA","end":{"date-parts":[[2011,5,5]]}},"container-title":["29th VLSI Test Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5772241\/5783722\/05783729.pdf?arnumber=5783729","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T21:16:12Z","timestamp":1497906972000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5783729\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/vts.2011.5783729","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}