{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T01:00:42Z","timestamp":1725498042114},"reference-count":21,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/vts.2011.5783781","type":"proceedings-article","created":{"date-parts":[[2011,6,7]],"date-time":"2011-06-07T16:35:25Z","timestamp":1307464525000},"page":"184-189","source":"Crossref","is-referenced-by-count":5,"title":["A new methodology for realistic open defect detection probability evaluation under process variations"],"prefix":"10.1109","author":[{"given":"Jesus","family":"Moreno","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Victor","family":"Champac","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michel","family":"Renovell","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1023\/A:1011179007753"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.907255"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391682"},{"key":"ref13","article-title":"CMOS Electronics How it Works, how it fails","author":"segura","year":"2004","journal-title":"Wiley Inter Science"},{"article-title":"High Speed CMOS Design Styles","year":"1998","author":"bernstein","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2001.929760"},{"article-title":"Probability, Random Variables and Stochastic Processes","year":"1991","author":"papoulis","key":"ref16"},{"year":"0","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-008-5085-z"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2007.11"},{"key":"ref4","first-page":"18","article-title":"Resistance Characterization for Weak Open Defects","author":"rodriguez-montafiez","year":"2002","journal-title":"IEEE Design & Test"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743133"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1991.519522"},{"key":"ref5","article-title":"Intel and the myths of test","author":"thompson","year":"1995","journal-title":"The Keynote Address of ITC"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1994.527999"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/43.177407"},{"journal-title":"Critical Reliability Challenges for the International Technology Roadmap for Semiconductors","year":"2003","author":"blish","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2002.1041766"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/43.811326"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2008.30"},{"key":"ref21","first-page":"1","article-title":"Test Generation for Interconnect Opens","author":"lin","year":"2008","journal-title":"International Test Conference"}],"event":{"name":"2011 IEEE VLSI Test Symposium (VTS)","start":{"date-parts":[[2011,5,1]]},"location":"Dana Point, CA, USA","end":{"date-parts":[[2011,5,5]]}},"container-title":["29th VLSI Test Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5772241\/5783722\/05783781.pdf?arnumber=5783781","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T07:28:13Z","timestamp":1490081293000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5783781\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/vts.2011.5783781","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}