{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,16]],"date-time":"2026-06-16T12:29:19Z","timestamp":1781612959995,"version":"3.54.5"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/vts.2011.5783784","type":"proceedings-article","created":{"date-parts":[[2011,6,7]],"date-time":"2011-06-07T16:35:25Z","timestamp":1307464525000},"page":"203-208","source":"Crossref","is-referenced-by-count":30,"title":["Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors"],"prefix":"10.1109","author":[{"given":"C. V.","family":"Martins","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"J.","family":"Semiao","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"J. C.","family":"Vazquez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"V.","family":"Champac","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M.","family":"Santos","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"I. C.","family":"Teixeira","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"J. P.","family":"Teixeira","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.244119"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2009.5196020"},{"key":"ref12","first-page":"726","article-title":"NBTI Induced Performance Degradation in Logic and Memory Circuits: How Effectively Can We Approach a Reliability Solution?","author":"kang","year":"2008","journal-title":"Proc AsiaSouth Pacific Design Autom Conf (ASP-DAC)"},{"key":"ref13","first-page":"1047","article-title":"Modeling and Minimization of PMOS NBTI Effect for Robust Nanometer Design","author":"vattikonda","year":"2006","journal-title":"Proc DAC"},{"key":"ref14","first-page":"735","article-title":"An Efficient Method to Identify Critical Gates under Circuit Aging","author":"wang","year":"2007","journal-title":"Proc ICCAD"},{"key":"ref15","first-page":"292","article-title":"Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-voltage Variations and Aging","author":"tschanz","year":"2007","journal-title":"IEEE Int Solid-State Circ Conf (ISSCC)"},{"key":"ref16","article-title":"Embedded Integrated Circuit Aging Sensor System","author":"gauthier","year":"2006"},{"key":"ref17","article-title":"System and Method for Monitoring Reliability of a Digital System","author":"kim","year":"2009"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283821"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2007.22"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2008.194"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870912"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VTSA.1997.614925"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1999.810665"},{"key":"ref8","first-page":"364","article-title":"The Impact of NBTI on the Performance of Combinational and Sequential Circuits","author":"reddy","year":"2007","journal-title":"Proc ACM\/IEEE Design Automation Conf (DAC)"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2009.4796494"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1006\/spmi.2000.0955"},{"key":"ref1","article-title":"Design for Variability: Managing Design, Process, and Manufacturing Variations in Physical Design","year":"2008","journal-title":"P&R Whitepaper"},{"key":"ref9","first-page":"176","article-title":"Reliability Challenges for 45 nm and Beyond","author":"mcpherson","year":"2006","journal-title":"Proc ACM\/IEEE Design Autom Conf (DAC)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2009.5195976"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2010.5560241"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2010.5469568"},{"key":"ref24","year":"0","journal-title":"Int technology roadmap for semiconductors"},{"key":"ref23","year":"0","journal-title":"Predictive Technology Model (PTM)"}],"event":{"name":"2011 IEEE VLSI Test Symposium (VTS)","location":"Dana Point, CA, USA","start":{"date-parts":[[2011,5,1]]},"end":{"date-parts":[[2011,5,5]]}},"container-title":["29th VLSI Test Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5772241\/5783722\/05783784.pdf?arnumber=5783784","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T02:46:15Z","timestamp":1490064375000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5783784\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/vts.2011.5783784","relation":{},"subject":[],"published":{"date-parts":[[2011,5]]}}}