{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T11:45:12Z","timestamp":1725536712561},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,4]]},"DOI":"10.1109\/vts.2015.7116265","type":"proceedings-article","created":{"date-parts":[[2015,6,10]],"date-time":"2015-06-10T19:32:59Z","timestamp":1433964779000},"page":"1-2","source":"Crossref","is-referenced-by-count":0,"title":["Special session: Hot topics: Statistical test methods"],"prefix":"10.1109","author":[{"given":"Manuel J.","family":"Barragan","sequence":"first","affiliation":[]},{"given":"Gildas","family":"Leger","sequence":"additional","affiliation":[]},{"given":"Florence","family":"Azais","sequence":"additional","affiliation":[]},{"given":"R. D.","family":"Blanton","sequence":"additional","affiliation":[]},{"given":"Adit D.","family":"Singh","sequence":"additional","affiliation":[]},{"given":"Stephen","family":"Sunter","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2012.6231074"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/43.986428"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2255128"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569362"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/LATW.2014.6841930"},{"key":"ref2","first-page":"132","article-title":"Enhancing test effectiveness for analog circuits using synthesized measurements","author":"variyam","year":"1998","journal-title":"VLSI Test Symposium 1998 Proceedings 16th IEEE"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2014.7035281"}],"event":{"name":"2015 IEEE 33rd VLSI Test Symposium (VTS)","start":{"date-parts":[[2015,4,27]]},"location":"Napa, CA, USA","end":{"date-parts":[[2015,4,29]]}},"container-title":["2015 IEEE 33rd VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7104933\/7116233\/07116265.pdf?arnumber=7116265","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T19:30:01Z","timestamp":1490383801000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7116265\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/vts.2015.7116265","relation":{},"subject":[],"published":{"date-parts":[[2015,4]]}}}