{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T08:18:23Z","timestamp":1725437903379},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,4]]},"DOI":"10.1109\/vts.2015.7116271","type":"proceedings-article","created":{"date-parts":[[2015,6,10]],"date-time":"2015-06-10T19:32:59Z","timestamp":1433964779000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Signature oriented model pruning to facilitate multi-threaded processors debugging"],"prefix":"10.1109","author":[{"given":"Fatemeh","family":"Refan","sequence":"first","affiliation":[]},{"given":"Bijan","family":"Alizadeh","sequence":"additional","affiliation":[]},{"given":"Zainalabedin","family":"Navabi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2278491"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2008.4700568"},{"key":"ref10","first-page":"68","article-title":"Automatic verification of pipelined microprocessor control","author":"burch","year":"1994","journal-title":"Proc ICCAD 9"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2011.5770740"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2061270"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6165044"},{"key":"ref7","first-page":"78","article-title":"Modeling and verifying systems using a logic of counter arithmetic with lambda expressions and uninterpreted functions","author":"bryant","year":"2002","journal-title":"Proc of CAV'0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852031"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2348839.2348841"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105403"}],"event":{"name":"2015 IEEE 33rd VLSI Test Symposium (VTS)","start":{"date-parts":[[2015,4,27]]},"location":"Napa, CA, USA","end":{"date-parts":[[2015,4,29]]}},"container-title":["2015 IEEE 33rd VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7104933\/7116233\/07116271.pdf?arnumber=7116271","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T19:24:08Z","timestamp":1490383448000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7116271\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/vts.2015.7116271","relation":{},"subject":[],"published":{"date-parts":[[2015,4]]}}}