{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T06:32:11Z","timestamp":1729665131248,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,4]]},"DOI":"10.1109\/vts.2017.7928938","type":"proceedings-article","created":{"date-parts":[[2017,5,18]],"date-time":"2017-05-18T22:35:20Z","timestamp":1495146920000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["An analytical model for predicting the residual life of an IC and design of residual-life meter"],"prefix":"10.1109","author":[{"given":"Md Nazmul","family":"Islam","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sandip","family":"Kundu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/S0951-8320(00)00066-1"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1016\/S0951-8320(00)00101-0"},{"key":"ref12","volume":"362","author":"lawless","year":"2011","journal-title":"Statistical Models and Methods for Lifetime Data"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/0951-8320(95)00149-2"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.1967.362408"},{"journal-title":"Actuarial life table","year":"2011","author":"administration","key":"ref15"},{"article-title":"Nangate open cell library","year":"2011","author":"initiative","key":"ref16"},{"key":"ref17","first-page":"130","article-title":"0.248 ?m2 and 0.334 ?m2conventional bulk 6t-sram bitcells for 45nm node low cost-general purpose applications","author":"boeuf","year":"2005","journal-title":"Symposium on VLSI Technology Digest of Technical Papers"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/NATW.2016.17"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2016.29"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372562"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1063\/1.1611263"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"277","DOI":"10.1109\/VTS.2007.22","article-title":"Circuit failure prediction and its application to transistor aging","author":"agarwal","year":"2007","journal-title":"VLSI Test Symposium 2007 25th IEEE"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2067810"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2013.6651924"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2015.7116290"},{"key":"ref2","article-title":"Failure mechanisms and models for semiconductor devices","author":"association","year":"2003","journal-title":"JEDEC Publication JEP122C"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2004.1311888"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2010.5469568"}],"event":{"name":"2017 IEEE 35th VLSI Test Symposium (VTS)","start":{"date-parts":[[2017,4,9]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2017,4,12]]}},"container-title":["2017 IEEE 35th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7921795\/7928905\/07928938.pdf?arnumber=7928938","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,24]],"date-time":"2019-09-24T20:44:13Z","timestamp":1569357853000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7928938\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,4]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/vts.2017.7928938","relation":{},"subject":[],"published":{"date-parts":[[2017,4]]}}}