{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,12]],"date-time":"2026-05-12T16:51:14Z","timestamp":1778604674488,"version":"3.51.4"},"reference-count":28,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,4]]},"DOI":"10.1109\/vts.2019.8758600","type":"proceedings-article","created":{"date-parts":[[2019,7,11]],"date-time":"2019-07-11T23:56:14Z","timestamp":1562889374000},"page":"1-6","source":"Crossref","is-referenced-by-count":57,"title":["RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level"],"prefix":"10.1109","author":[{"given":"Miao","family":"He","sequence":"first","affiliation":[]},{"given":"Jungmin","family":"Park","sequence":"additional","affiliation":[]},{"given":"Adib","family":"Nahiyan","sequence":"additional","affiliation":[]},{"given":"Apostol","family":"Vassilev","sequence":"additional","affiliation":[]},{"given":"Yier","family":"Jin","sequence":"additional","affiliation":[]},{"given":"Mark","family":"Tehranipoor","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-42001-6_12"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea7010004"},{"key":"ref12","doi-asserted-by":"crossref","first-page":"209","DOI":"10.46586\/tches.v2018.i1.209-237","article-title":"Leakage detection with the x2-test","volume":"2018","author":"moradi","year":"2018","journal-title":"IACR Transactions on Cryptographic Hardware and Embedded Systems"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1214\/aoms\/1177729694"},{"key":"ref14","article-title":"A statistics-based fundamental model for side-channel attack analysis","author":"fei","year":"2014","journal-title":"Cryptology ePrint Archive"},{"key":"ref15","article-title":"Nist-recommended random number generator based on ansi x9. 31 appendix a. 2.4 using the 3-key triple des and aes algorithms","author":"keller","year":"2005","journal-title":"NIST Information Technology Laboratory-Computer Security Division National Institute of Standards and Technology"},{"key":"ref16","author":"lab","year":"2007","journal-title":"Galois field based aes verilog design"},{"key":"ref17","author":"lab","year":"2017","journal-title":"Lookup table based aes verilog design"},{"key":"ref18","year":"2018","journal-title":"Synopsys"},{"key":"ref19","author":"lab","year":"2013","journal-title":"Sakura-g fpga'"},{"key":"ref28","article-title":"Security-aware fsm design flow for identifying and mitigating vulnerabilities to fault attacks","author":"nahiyan","year":"2018","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-85053-3_27"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2017.8242062"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-36400-5_3"},{"key":"ref6","author":"mangard","year":"2007","journal-title":"Power Analysis Attacks Revealing the Secrets of Smart Cards (Advances in Information Security)"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_14"},{"key":"ref8","first-page":"13","article-title":"Test vector leakage assessment (TVLA) methodology in practice","volume":"1001","author":"becker","year":"2013","journal-title":"International Cryptographic Module Conference"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2002.1004593"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/11894063_2"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"388","DOI":"10.1007\/3-540-48405-1_25","article-title":"Differential power analysis","author":"kocher","year":"1999","journal-title":"Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology ser CRYPTO ‘99"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/EuroSPW.2017.59"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2006.1693233"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-35691-4_45"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2016.226"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CSE.2009.119"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2897992"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-49025-0_2"}],"event":{"name":"2019 IEEE 37th VLSI Test Symposium (VTS)","location":"Monterey, CA, USA","start":{"date-parts":[[2019,4,23]]},"end":{"date-parts":[[2019,4,25]]}},"container-title":["2019 IEEE 37th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8753115\/8758605\/08758600.pdf?arnumber=8758600","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T14:52:56Z","timestamp":1658155976000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8758600\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/vts.2019.8758600","relation":{},"subject":[],"published":{"date-parts":[[2019,4]]}}}