{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,4]],"date-time":"2025-11-04T10:44:12Z","timestamp":1762253052717},"reference-count":23,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,4,1]],"date-time":"2019-04-01T00:00:00Z","timestamp":1554076800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,4]]},"DOI":"10.1109\/vts.2019.8758646","type":"proceedings-article","created":{"date-parts":[[2019,7,11]],"date-time":"2019-07-11T23:56:14Z","timestamp":1562889374000},"page":"1-6","source":"Crossref","is-referenced-by-count":5,"title":["Layout-Based Dual-Cell-Aware Tests"],"prefix":"10.1109","author":[{"given":"Tse-Wei","family":"Wu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dong-Zhen","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu-Hao","family":"Huang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mango C.-T.","family":"Chao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kai-Chiang","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shu-Yi","family":"Kao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ying-Yen","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Po-Lin","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mason","family":"Chern","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jih-Nung","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCS.1987.1086138"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1993.470715"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355741"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2011.6139151"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2012.6401533"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2014.6847814"},{"journal-title":"Mentor Graphics","article-title":"Tessent® CellModelGen Tool Reference","year":"2014","key":"ref16"},{"journal-title":"Mentor Graphics","article-title":"Tessent® Scan and ATPG User's Manual","year":"2014","key":"ref17"},{"key":"ref18","first-page":"1","article-title":"Methodology of generating dual-cell-aware tests","author":"huang","year":"2017","journal-title":"Proc of VLSI Test Symp (VTS)"},{"key":"ref19","first-page":"1","article-title":"DFM-aware fault model and ATPG for intra-cell and inter-cell defects","author":"ainha","year":"2017","journal-title":"Proc of Int'l Test Conf (ITC)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1994.527981"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2015.7116301"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.1991.199958"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2001.966792"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966731"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2003.1250804"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2006.8"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1988.207853"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2009.25"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2018.8624825"},{"journal-title":"Mentor Graphics","article-title":"Calibre® xRC™ User's Manual","year":"2012","key":"ref22"},{"journal-title":"Cadence Design System","article-title":"Virtuoso® Layout Suite L User Guide","year":"2015","key":"ref21"},{"journal-title":"HSPICE Simulation and Analysis User Guide","year":"2014","key":"ref23"}],"event":{"name":"2019 IEEE 37th VLSI Test Symposium (VTS)","start":{"date-parts":[[2019,4,23]]},"location":"Monterey, CA, USA","end":{"date-parts":[[2019,4,25]]}},"container-title":["2019 IEEE 37th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8753115\/8758605\/08758646.pdf?arnumber=8758646","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,18]],"date-time":"2022-07-18T14:49:56Z","timestamp":1658155796000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8758646\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,4]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/vts.2019.8758646","relation":{},"subject":[],"published":{"date-parts":[[2019,4]]}}}