{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:55:58Z","timestamp":1730303758027,"version":"3.28.0"},"reference-count":29,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,4,1]],"date-time":"2020-04-01T00:00:00Z","timestamp":1585699200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,4]]},"DOI":"10.1109\/vts48691.2020.9107605","type":"proceedings-article","created":{"date-parts":[[2020,6,4]],"date-time":"2020-06-04T20:30:31Z","timestamp":1591302631000},"page":"1-6","source":"Crossref","is-referenced-by-count":6,"title":["Mitigating Read Failures in STT-MRAM"],"prefix":"10.1109","author":[{"given":"Sarath Mohanachandran","family":"Nair","sequence":"first","affiliation":[]},{"given":"Rajendra","family":"Bishnoi","sequence":"additional","affiliation":[]},{"given":"Mehdi B.","family":"Tahoori","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"STTRAM scaling and retention failure","volume":"17","author":"naeimi","year":"2013","journal-title":"Intel Technology Journal"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1063\/1.2976435"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/7\/074001"},{"key":"ref13","first-page":"384","article-title":"Failure mitigation techniques for 1T-1MTJ spin-transfer torque MRAM bit-cells","volume":"22","author":"fong","year":"2013","journal-title":"TVLSI"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333665"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2997650"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2014.2357054"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2606438"},{"key":"ref18","first-page":"1783","article-title":"Self-timed read and write operations in STT-MRAM","volume":"24","author":"bishnoi","year":"2015","journal-title":"TVLSI"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2014.7035342"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/MIEL.2012.6222840"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2015.29"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7927049"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2015.24"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105334"},{"key":"ref29","article-title":"SPITT: A magnetic tunnel junction SPICE compact model for STT-MRAM","author":"bernard-granger","year":"2015","journal-title":"Proceedings of the MOS-AK Workshop of DATE"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2064150"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2015.1018"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.7567\/JJAP.57.04FN01"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/S1369-7021(06)71539-5"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2016.2541629"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2003.1250885"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2016.28"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2010.5488324"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/NanoArch.2013.6623037"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742972"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2011.07.001"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2463585.2463589"},{"key":"ref25","first-page":"501","article-title":"Study of two writing schemes for a magnetic tunnel junction based on spin orbit torque","author":"jabeur","year":"2013","journal-title":"International Journal of Electronics Science and Engineering"}],"event":{"name":"2020 IEEE 38th VLSI Test Symposium (VTS)","start":{"date-parts":[[2020,4,5]]},"location":"San Diego, CA, USA","end":{"date-parts":[[2020,4,8]]}},"container-title":["2020 IEEE 38th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9106465\/9107548\/09107605.pdf?arnumber=9107605","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,30]],"date-time":"2022-06-30T15:04:41Z","timestamp":1656601481000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9107605\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,4]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/vts48691.2020.9107605","relation":{},"subject":[],"published":{"date-parts":[[2020,4]]}}}