{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,29]],"date-time":"2026-07-29T14:47:14Z","timestamp":1785336434663,"version":"3.55.0"},"reference-count":94,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,4,25]],"date-time":"2021-04-25T00:00:00Z","timestamp":1619308800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,4,25]],"date-time":"2021-04-25T00:00:00Z","timestamp":1619308800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,4,25]],"date-time":"2021-04-25T00:00:00Z","timestamp":1619308800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,4,25]]},"DOI":"10.1109\/vts50974.2021.9441050","type":"proceedings-article","created":{"date-parts":[[2021,5,31]],"date-time":"2021-05-31T21:36:38Z","timestamp":1622496998000},"page":"1-10","source":"Crossref","is-referenced-by-count":29,"title":["Special Session: Reliability Analysis for AI\/ML Hardware"],"prefix":"10.1109","author":[{"given":"Shamik","family":"Kundu","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kanad","family":"Basu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mehdi","family":"Sadi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Twisha","family":"Titirsha","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Shihao","family":"Song","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Anup","family":"Das","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ujjwal","family":"Guin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref73","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2019.8720526"},{"key":"ref72","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2017.2742700"},{"key":"ref71","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.2018.8353555"},{"key":"ref70","article-title":"Run-time mapping for reliable many-cores based on energy\/performance tradeoffs","author":"bolchini","year":"2013","journal-title":"DFTS"},{"key":"ref76","article-title":"Enabling resource-aware mapping of spiking neural networks via spatial decomposition","author":"balaji","year":"2020","journal-title":"ESL"},{"key":"ref77","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2951493"},{"key":"ref74","article-title":"PyCARL: A PyNN interface for hardware-software co-simulation of spiking neural network","author":"balaji","year":"2020","journal-title":"IJCNN"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.112130359"},{"key":"ref75","doi-asserted-by":"publisher","DOI":"10.1145\/3372799.3394364"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2019.2903009"},{"key":"ref78","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2019.00043"},{"key":"ref79","doi-asserted-by":"publisher","DOI":"10.1145\/3194554.3194627"},{"key":"ref33","article-title":"BFloat16: The secret to high performance on Cloud TPUs","author":"wang","year":"2019","journal-title":"Google Cloud"},{"key":"ref32","article-title":"Yield and Reliability Challenges at 7nm and Below","author":"strojwas","year":"2019","journal-title":"Electron Device Technology and Manufacturing Conference"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126964"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2734685"},{"key":"ref37","article-title":"A scalable multicore architecture with heterogeneous memory structures for dynamic neuromorphic asynchronous processors (DYNAPs)","author":"moradi","year":"2017","journal-title":"TBCAS"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1016\/S0893-6080(97)00011-7"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/5.58356"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2019.2915656"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2013.6581540"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593199"},{"key":"ref61","article-title":"Workload change point detection for runtime thermal management of embedded systems","author":"das","year":"2015","journal-title":"TCAD"},{"key":"ref63","article-title":"Improving autonomous softerror tolerance of FPGA through LUT configuration bit manipulation","author":"das","year":"2013","journal-title":"FPL"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2016.2602806"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927476"},{"key":"ref27","article-title":"ISO 26262","year":"2018","journal-title":"Road Vehicles-Functional Safety"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1016\/j.future.2013.06.016"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1145\/2544375.2544392"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2491263"},{"key":"ref67","doi-asserted-by":"publisher","DOI":"10.1109\/ICPADS.2012.82"},{"key":"ref68","doi-asserted-by":"publisher","DOI":"10.7873\/DATE2014.115"},{"key":"ref69","doi-asserted-by":"publisher","DOI":"10.1145\/2834120"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7418007"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126964"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS50870.2020.9159704"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3295500.3356177"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3048829"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2019.2915656"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3051841"},{"key":"ref25","article-title":"Imagenet: A large-scale hierarchical image database","author":"j d","year":"2009","journal-title":"CVPR"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2019.2951507"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/EDCC51268.2020.00013"},{"key":"ref94","article-title":"Recent progress in phase-change memory technology","author":"burr","year":"2016","journal-title":"JETCAS"},{"key":"ref93","article-title":"Lifelong machine learning systems: Beyond learning algorithms","author":"silver","year":"2013","journal-title":"AAAI"},{"key":"ref92","article-title":"Endurance-aware mapping of spiking neural networks to neuromorphic hardware","author":"titirsha","year":"2021","journal-title":"TPDS"},{"key":"ref91","article-title":"Thermal-aware compilation of spiking neural networks to neuromorphic hardware","author":"titirsha","year":"2020","journal-title":"LCPC"},{"key":"ref90","article-title":"Reliability-performance trade-offs in neuromorphic computing","author":"titirsha","year":"2020","journal-title":"IGS Workshop"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0018"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2012.6322894"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-69374-3"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.149"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2014.074"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/CASES.2013.6662505"},{"key":"ref53","article-title":"Reliability and energy-aware mapping and scheduling of multimedia applications on multiprocessor systems","author":"das","year":"2015","journal-title":"TPDS"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS48704.2020.9184557"},{"key":"ref10","first-page":"1172","article-title":"Quality configurable approximate dram","volume":"66","author":"raha","year":"2016","journal-title":"IEEE TC"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2020.9126102"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3319491"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2019.8701189"},{"key":"ref13","year":"2021","journal-title":"Intel movidius&#x2122; myriad&#x2122; x vision processing unit (vpu)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2910232"},{"key":"ref15","year":"2020","journal-title":"Nvidia ampere architecture - nvidia"},{"key":"ref82","article-title":"Compiling spiking neural networks to mitigate neuromorphic hardware constraints","author":"balaji","year":"2020","journal-title":"IGS Workshop"},{"key":"ref16","year":"2020","journal-title":"Intel keem bay vpu"},{"key":"ref81","doi-asserted-by":"publisher","DOI":"10.1145\/3457388.3458664"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3195997"},{"key":"ref84","article-title":"A novel binary particle swarm optimization","author":"khanesar","year":"2007","journal-title":"Mediterranean Conference on Control & Automation"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714885"},{"key":"ref83","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342201"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2019.00025"},{"key":"ref80","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-020-01573-8"},{"key":"ref89","author":"moyer","year":"2020","journal-title":"Machine learning applications to dna subsequence and restriction site analysis"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2018.8368656"},{"key":"ref3","first-page":"1","article-title":"4.6 a1. 93tops\/w scalable deep learning\/inference processor with tetra-parallel mimd architecture for big-data applications","author":"park","year":"2015","journal-title":"IEEE ISSCC"},{"key":"ref6","first-page":"1","article-title":"Sparkk: Quality-scalable approximate storage in dram","author":"lucas","year":"2014","journal-title":"The Memory Forum"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950391"},{"key":"ref85","doi-asserted-by":"publisher","DOI":"10.1016\/j.neunet.2017.12.015"},{"key":"ref8","article-title":"Refreshing thoughts on dram: Power saving vs. data integrity","author":"rahmati","year":"2014","journal-title":"Workshop on Approximate Computing Across the System Stack"},{"key":"ref86","doi-asserted-by":"publisher","DOI":"10.1145\/3278576.3278598"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1993316.1993518"},{"key":"ref49","article-title":"Design methodologies for reliable and energy-efficient PCM systems","author":"song","year":"2020","journal-title":"IGS Workshop"},{"key":"ref87","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2018.1582"},{"key":"ref88","author":"moyer","year":"2021","journal-title":"Motif identification using cnn-based pairwise subsequence alignment score prediction"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2017.2658566"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/3381898.3397215"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/3358180"},{"key":"ref48","article-title":"Aging aware request scheduling for non-volatile main memory","author":"song","year":"2021","journal-title":"ASP-DAC"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/3381898.3397210"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-67723-1_13"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3319490"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1080\/23746149.2016.1259585"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.23919\/VLSIT.2017.7998166"}],"event":{"name":"2021 IEEE 39th VLSI Test Symposium (VTS)","location":"San Diego, CA, USA","start":{"date-parts":[[2021,4,25]]},"end":{"date-parts":[[2021,4,28]]}},"container-title":["2021 IEEE 39th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9440994\/9440995\/09441050.pdf?arnumber=9441050","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T15:41:58Z","timestamp":1652197318000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9441050\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,25]]},"references-count":94,"URL":"https:\/\/doi.org\/10.1109\/vts50974.2021.9441050","relation":{},"subject":[],"published":{"date-parts":[[2021,4,25]]}}}