{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,3]],"date-time":"2026-04-03T06:59:14Z","timestamp":1775199554179,"version":"3.50.1"},"reference-count":44,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,4,25]],"date-time":"2022-04-25T00:00:00Z","timestamp":1650844800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,4,25]],"date-time":"2022-04-25T00:00:00Z","timestamp":1650844800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,4,25]]},"DOI":"10.1109\/vts52500.2021.9794278","type":"proceedings-article","created":{"date-parts":[[2022,6,15]],"date-time":"2022-06-15T16:19:24Z","timestamp":1655309964000},"page":"1-10","source":"Crossref","is-referenced-by-count":6,"title":["Special Session: STT-MRAMs: Technology, Design and Test"],"prefix":"10.1109","author":[{"given":"Anteneh","family":"Gebregiorgis","sequence":"first","affiliation":[{"name":"Delft University of Technology,Department of Quantum and Computer Engineering,Delft,Netherlands"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lizhou","family":"Wu","sequence":"additional","affiliation":[{"name":"Delft University of Technology,Department of Quantum and Computer Engineering,Delft,Netherlands"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christopher","family":"Munch","sequence":"additional","affiliation":[{"name":"Karlsruhe Institute of Technology,Chair of Dependable Nano Computing,Karlsruhe,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Siddharth","family":"Rao","sequence":"additional","affiliation":[{"name":"IMEC,Leuven,Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mehdi B.","family":"Tahoori","sequence":"additional","affiliation":[{"name":"Karlsruhe Institute of Technology,Chair of Dependable Nano Computing,Karlsruhe,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Said","family":"Hamdioui","sequence":"additional","affiliation":[{"name":"Delft University of Technology,Department of Quantum and Computer Engineering,Delft,Netherlands"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2018.8624725"},{"key":"ref38","article-title":"A 14.7Mb\/mm2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52\/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference","author":"boujamaa","year":"2020","journal-title":"Symposium on VLSI Circuits"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/EuroSimE.2016.7463380"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2018.8510637"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2015.7223660"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM13553.2020.9371922"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351201"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MIEL.2012.6222840"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2012.2200469"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TCHMT.1986.1136646"},{"key":"ref10","article-title":"Stt-mram sensing: a review","author":"na","year":"2020","journal-title":"Transactions on Circuits and Systems II Express Briefs"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS46558.2021.9405094"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2019.8791518"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2014.7047080"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2018.8624749"},{"key":"ref14","article-title":"Basic principles of STT-MRAM cell operation in memory arrays","author":"khvalkovskiy","year":"2013","journal-title":"J Phys D Appl Phys"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.63.054416"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2011.07.001"},{"key":"ref17","doi-asserted-by":"crossref","DOI":"10.1038\/s41598-019-54466-7","article-title":"Ultrathin perpendicular magnetic anisotropy cofeb free layers for highly efficient, high speed writing in spin-transfer-torque magnetic random access memory","author":"iwata-harms","year":"2019","journal-title":"Scientific Reports"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1063\/5.0022576"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2010.5556123"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614635"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS46558.2021.9405209"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062955"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993469"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2013.6724549"},{"key":"ref5","article-title":"Survey on stt-mram testing: failure mechanisms, fault models, and tests","author":"wu","year":"2020"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM19573.2019.8993454"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VTS48691.2020.9107605"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2018.8614637"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2016.2590142"},{"key":"ref9","article-title":"Spin-transfer torque mram (stt-mram): Challenges and prospects","author":"huai","year":"2008","journal-title":"AAPPS Bulletin"},{"key":"ref1","year":"0","journal-title":"International Roadmap for Devices and Systems (IRDS)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/IMW51353.2021.9439592"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1038\/nmat2804"},{"key":"ref21","article-title":"Challenges and solutions in emerging memory testing","author":"vatajelu","year":"2017","journal-title":"IEEE Transactions on Emerging Topics in Computing"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1116\/6.0000205"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2000.893615"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/INTMAG.2018.8508858"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ITC44170.2019.9000134"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1063\/1.4923420"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9473999"},{"key":"ref25","article-title":"Defect and fault modeling framework for STT-MRAM testing","author":"wu","year":"2019","journal-title":"IEEE Transactions on Emerging Topics in Computing"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/ITC44778.2020.9325258"}],"event":{"name":"2022 IEEE 40th VLSI Test Symposium (VTS)","location":"San Diego, CA, USA","start":{"date-parts":[[2022,4,25]]},"end":{"date-parts":[[2022,4,27]]}},"container-title":["2022 IEEE 40th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9793839\/9794139\/09794278.pdf?arnumber=9794278","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,11]],"date-time":"2022-07-11T16:04:37Z","timestamp":1657555477000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9794278\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4,25]]},"references-count":44,"URL":"https:\/\/doi.org\/10.1109\/vts52500.2021.9794278","relation":{},"subject":[],"published":{"date-parts":[[2022,4,25]]}}}