{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T15:56:56Z","timestamp":1730303816305,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,4,22]],"date-time":"2024-04-22T00:00:00Z","timestamp":1713744000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,4,22]],"date-time":"2024-04-22T00:00:00Z","timestamp":1713744000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,4,22]]},"DOI":"10.1109\/vts60656.2024.10538727","type":"proceedings-article","created":{"date-parts":[[2024,5,29]],"date-time":"2024-05-29T17:24:14Z","timestamp":1717003454000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["Fuzz Wars: The Voltage Awakens \u2013 Voltage-Guided Blackbox Fuzzing on FPGAs"],"prefix":"10.1109","author":[{"given":"Kai","family":"Su","sequence":"first","affiliation":[{"name":"Karlsruhe University of Applied Science (HKA),Institute of Energy Efficient Mobility,Karlsruhe,Germany"}]},{"given":"Mark","family":"Giraud","sequence":"additional","affiliation":[{"name":"Fraunhofer Institute of Optronics,System Technologies and Image Exploitation IOSB,Karlsruhe,Germany"}]},{"given":"Anne","family":"Borcherding","sequence":"additional","affiliation":[{"name":"Fraunhofer Institute of Optronics,System Technologies and Image Exploitation IOSB,Karlsruhe,Germany"}]},{"given":"Jonas","family":"Krautter","sequence":"additional","affiliation":[{"name":"Institute of Computer Engineering,Karlsruhe Institute of Technology (KIT),Karlsruhe,Germany"}]},{"given":"Philipp","family":"Nenninger","sequence":"additional","affiliation":[{"name":"Karlsruhe University of Applied Science (HKA),Institute of Energy Efficient Mobility,Karlsruhe,Germany"}]},{"given":"Mehdi","family":"Tahoori","sequence":"additional","affiliation":[{"name":"Institute of Computer Engineering,Karlsruhe Institute of Technology (KIT),Karlsruhe,Germany"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1126\/science.283.5406.1237c"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3399742"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-019-05777-0"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240842"},{"key":"ref5","first-page":"3237","article-title":"Fuzzing hardware like software","volume-title":"31st USENIX Security Symposium (USENIX Security 22)","author":"Trippel"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323913"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323726"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323819"},{"key":"ref9","article-title":"Fuzzing: Art, science, and engineering","volume":"abs\/1812.00140","author":"Man\u00e8s","year":"2018","journal-title":"CoRR"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3548606.3560602"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/2435264.2435283"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/54.936247"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.2019.2941681"},{"article-title":"Coverage analysis techniques for HDL design validation","volume-title":"IEEE Asia Pacific Conference on Chip Design Languages","author":"Jou","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2007.19"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203780"},{"volume-title":"Verilator","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3453688.3464508"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-29959-0_13"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342177"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/3555048"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/3580596"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3243734.3243804"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.46586\/tches.v2020.i3.121-146"}],"event":{"name":"2024 IEEE 42nd VLSI Test Symposium (VTS)","start":{"date-parts":[[2024,4,22]]},"location":"Tempe, AZ, USA","end":{"date-parts":[[2024,4,24]]}},"container-title":["2024 IEEE 42nd VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10538470\/10538498\/10538727.pdf?arnumber=10538727","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,5,30]],"date-time":"2024-05-30T12:34:37Z","timestamp":1717072477000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10538727\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4,22]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/vts60656.2024.10538727","relation":{},"subject":[],"published":{"date-parts":[[2024,4,22]]}}}