{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T07:58:59Z","timestamp":1767772739215},"reference-count":24,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,4,22]],"date-time":"2024-04-22T00:00:00Z","timestamp":1713744000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,4,22]],"date-time":"2024-04-22T00:00:00Z","timestamp":1713744000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,4,22]]},"DOI":"10.1109\/vts60656.2024.10538813","type":"proceedings-article","created":{"date-parts":[[2024,5,29]],"date-time":"2024-05-29T17:24:14Z","timestamp":1717003454000},"page":"1-7","source":"Crossref","is-referenced-by-count":3,"title":["Static Gate-Level Information Flow for Hardware Information Security with Bounded Model Checking"],"prefix":"10.1109","author":[{"given":"Yiqiang","family":"Zhao","sequence":"first","affiliation":[{"name":"Tianjin University,School of Microelectronics,Tianjin,China"}]},{"given":"Gonsen","family":"Qu","sequence":"additional","affiliation":[{"name":"Tianjin University,School of Microelectronics,Tianjin,China"}]},{"given":"Qizhi","family":"Zhang","sequence":"additional","affiliation":[{"name":"Tianjin University,School of Microelectronics,Tianjin,China"}]},{"given":"Yao","family":"Li","sequence":"additional","affiliation":[{"name":"Tianjin University,School of Microelectronics,Tianjin,China"}]},{"given":"Zhengyang","family":"Li","sequence":"additional","affiliation":[{"name":"Tianjin University,School of Microelectronics,Tianjin,China"}]},{"given":"Jiaji","family":"He","sequence":"additional","affiliation":[{"name":"Tianjin University,School of Microelectronics,Tianjin,China"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665726"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2019.2915318"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3066560"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065036"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.23919\/date.2018.8342260"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508258"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/tifs.2012.2189105"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.cose.2019.05.005"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/asianhost56390.2022.10022211"},{"key":"ref10","first-page":"2549","article-title":"{CellIFT}: Leveraging cells for scalable and precise dynamic information flow tracking in {RTL}","volume-title":"31st USENIX Security Symposium (USENIX Security 22)","author":"Solt"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/iccd53106.2021.00098"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.26599\/TST.2019.9010042"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/dsa56465.2022.00063"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2254064.2254078"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2775054.2694372"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/hst.2019.8740840"},{"key":"ref17","article-title":"Secchisel: Language and tool for practical and scalable security verification of security-aware hardware architectures","author":"Deng","year":"2017","journal-title":"Cryptology ePrint Archive"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1007\/BFb0058022"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1023\/A:1011276507260"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-78800-3_24"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/test.2017.8242062"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2011.2120970"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657085"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/s41635-017-0001-6"}],"event":{"name":"2024 IEEE 42nd VLSI Test Symposium (VTS)","start":{"date-parts":[[2024,4,22]]},"location":"Tempe, AZ, USA","end":{"date-parts":[[2024,4,24]]}},"container-title":["2024 IEEE 42nd VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10538470\/10538498\/10538813.pdf?arnumber=10538813","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,5,30]],"date-time":"2024-05-30T10:57:03Z","timestamp":1717066623000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10538813\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4,22]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/vts60656.2024.10538813","relation":{},"subject":[],"published":{"date-parts":[[2024,4,22]]}}}