{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T07:51:38Z","timestamp":1767772298083,"version":"3.41.0"},"reference-count":21,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,4,28]],"date-time":"2025-04-28T00:00:00Z","timestamp":1745798400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,4,28]],"date-time":"2025-04-28T00:00:00Z","timestamp":1745798400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,4,28]]},"DOI":"10.1109\/vts65138.2025.11022922","type":"proceedings-article","created":{"date-parts":[[2025,6,10]],"date-time":"2025-06-10T17:48:39Z","timestamp":1749577719000},"page":"1-5","source":"Crossref","is-referenced-by-count":1,"title":["From Design to Inspection: Can Inspection-aware Design Enhance Reliability in Advanced Packaging?"],"prefix":"10.1109","author":[{"given":"Katayoon","family":"Yahyaei","sequence":"first","affiliation":[{"name":"University of Florida,Dept. of Electrical &amp; Computer Eng.,Gainesville,FL,USA"}]},{"given":"M Shafkat M","family":"Khan","sequence":"additional","affiliation":[{"name":"University of Florida,Dept. of Electrical &amp; Computer Eng.,Gainesville,FL,USA"}]},{"given":"Navid","family":"Asadizanjani","sequence":"additional","affiliation":[{"name":"University of Florida,Dept. of Electrical &amp; Computer Eng.,Gainesville,FL,USA"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-15-7090-2"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1117\/12.3024745"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1117\/1.JMM.13.1.011202"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCPMT.2023.3311801"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.31399\/asm.cp.istfa2021p0059"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.4071\/2380-4505-2020.1.000165"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1117\/12.3027317"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1117\/12.3028177"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IPFA55383.2022.9915760"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/PAINE58317.2023.10317959"},{"issue":"3","key":"ref11","first-page":"517","article-title":"Reliability challenges in 3d ic packaging technology","volume-title":"Microelectronics Reliability","volume":"51","author":"Tu","year":"2011"},{"key":"ref12","article-title":"Design-driven inspection or measurement for semiconductor using recipe","volume-title":"U.S. Patent","author":"Bevis","year":"2005"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ASMC.2019.8791745"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ASMC.2017.7969215"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1108\/eb046032"},{"article-title":"Chiplet-gym: Optimizing chiplet-based ai accelerator design with reinforcement learning","year":"2024","author":"Mishty","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/3583781.3590233"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2656843"},{"journal-title":"National Institute of Standards and Technology (NIST), Tech. Rep.","article-title":"Metrology gaps in the semiconductor ecosystem: First steps toward establishing the chips rd metrology program","year":"2023","key":"ref19"},{"issue":"3","key":"ref20","article-title":"Novi-sim: A fast x-ray tomography simulation software for laboratory and synchrotron systems to generate training databases for deep learning applications","volume-title":"12th Conference on Industrial Computed Tomography (iCT) 2023","volume":"28","author":"Neffati"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1117\/12.3060349"}],"event":{"name":"2025 IEEE 43rd VLSI Test Symposium (VTS)","start":{"date-parts":[[2025,4,28]]},"location":"Tempe, AZ, USA","end":{"date-parts":[[2025,4,30]]}},"container-title":["2025 IEEE 43rd VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11022705\/11022774\/11022922.pdf?arnumber=11022922","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,11]],"date-time":"2025-06-11T17:41:41Z","timestamp":1749663701000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11022922\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,4,28]]},"references-count":21,"URL":"https:\/\/doi.org\/10.1109\/vts65138.2025.11022922","relation":{},"subject":[],"published":{"date-parts":[[2025,4,28]]}}}