{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T06:51:32Z","timestamp":1781851892014,"version":"3.54.5"},"reference-count":30,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T00:00:00Z","timestamp":1777248000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T00:00:00Z","timestamp":1777248000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,27]]},"DOI":"10.1109\/vts69484.2026.11563201","type":"proceedings-article","created":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T20:06:49Z","timestamp":1781813209000},"page":"1-7","source":"Crossref","is-referenced-by-count":0,"title":["WaferIntel: A Lightweight, SME-Driven Framework for Advanced Defect Pattern Analysis"],"prefix":"10.1109","author":[{"given":"Dmitri V.","family":"Kalashnikov","sequence":"first","affiliation":[{"name":"Azure Data and AI Solutions (ADAS) Microsoft,Redmond,WA,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jianqiao","family":"Huang","sequence":"additional","affiliation":[{"name":"Silicon Mfg. & Packaging Eng. (SMPE) Microsoft,Redmond,WA,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pan","family":"Yan","sequence":"additional","affiliation":[{"name":"Silicon Mfg. & Packaging Eng. (SMPE) Microsoft,Redmond,WA,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2014.2364237"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50571.2021.00020"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ITC51657.2024.00030"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50571.2021.00019"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ITC51657.2024.00011"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18072.2020.9218580"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2020.3013004"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ITC50671.2022.00006"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1038\/s41598-023-34147-2"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/s10845-023-02231-z"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s10845-024-02444-w"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/s10845-022-02023-x"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-025-07113-0"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/s10845-022-01994-1"},{"issue":"2","key":"ref15","doi-asserted-by":"crossref","first-page":"1","DOI":"10.11627\/jksie.2023.46.2.001","article-title":"Detection of defect patterns on wafer bin map using fully convolutional data description (FCDD)","volume":"46","author":"Jang","year":"2023","journal-title":"J. Korean Soc. Ind. Syst. Eng."},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2729469"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2016.7527389"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2015.2497264"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2019.2937793"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2019.2925361"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2020.2994357"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ITC44778.2020.9325254"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-19639-3_9"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1080\/00207543.2012.737943"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1117\/12.275936"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1117\/12.350840"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/j.ejor.2005.11.032"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2018.2806931"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2018.8624733"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.33079\/jomm.19020401"}],"event":{"name":"2026 IEEE 44th VLSI Test Symposium (VTS)","location":"Napa, CA, USA","start":{"date-parts":[[2026,4,27]]},"end":{"date-parts":[[2026,4,29]]}},"container-title":["2026 IEEE 44th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11563061\/11563198\/11563201.pdf?arnumber=11563201","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:57:42Z","timestamp":1781848662000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11563201\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,27]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/vts69484.2026.11563201","relation":{},"subject":[],"published":{"date-parts":[[2026,4,27]]}}}