{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:53:12Z","timestamp":1781848392035,"version":"3.54.5"},"reference-count":35,"publisher":"IEEE","license":[{"start":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T00:00:00Z","timestamp":1777248000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2026,4,27]],"date-time":"2026-04-27T00:00:00Z","timestamp":1777248000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100007140","name":"Synopsys","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100007140","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026,4,27]]},"DOI":"10.1109\/vts69484.2026.11563407","type":"proceedings-article","created":{"date-parts":[[2026,6,18]],"date-time":"2026-06-18T20:06:49Z","timestamp":1781813209000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Closing the Loop in LLM-Based Hardware Generation: An Autonomous Agentic Workflow for Robust TPU Design"],"prefix":"10.1109","author":[{"given":"Deepak","family":"Vungarala","sequence":"first","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kartik","family":"Pandit","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Gamana","family":"Aragonda","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jeremy","family":"McLynch","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Adeola","family":"Adeoye-Davids","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bryan","family":"Galecio","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"NhatHai","family":"Phan","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Abdallah","family":"Khreishah","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ramtin","family":"Zand","sequence":"additional","affiliation":[{"name":"University of South Carolina,Columbia,SC,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Arnob","family":"Ghosh","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Shaahin","family":"Angizi","sequence":"additional","affiliation":[{"name":"New Jersey Institute of Technology,Newark,NJ,USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080246"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2020.3006451"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3643681"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2024.3383347"},{"key":"ref5","article-title":"Gen-acceleration: Pioneering work for hardware accelerator generation using large language models","author":"Vungarala","year":"2023"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MLCAD58807.2023.10299874"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICLAD65226.2025.00019"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS56072.2025.11044008"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323953"},{"key":"ref10","article-title":"Verigen: Large language model assisted verilog generation","author":"Thakur","year":"2023","journal-title":"arXiv preprint arXiv:2311.04887"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/tcad.2026.3694341"},{"key":"ref12","article-title":"Assertllm: Generating and evaluating hardware verification assertions from design specifications via multi-llms","author":"Fang","year":"2024","journal-title":"arXiv:2402.00386v1"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/dac63849.2025.11435108"},{"key":"ref14","article-title":"Chipgpt: How far are we from natural language hardware design","author":"Chang","year":"2023","journal-title":"arXiv preprint arXiv:2305.14019"},{"key":"ref15","article-title":"Autochip: Automating hdl generation using llm feedback","author":"Thakur","year":"2023","journal-title":"arXiv preprint arXiv:2311.04887"},{"key":"ref16","article-title":"Tpu-gen: Closing the loop in llm-based hardware generation for tensor processing units","author":"Vungarala","year":"2025"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/LAD62341.2024.10691738"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LAD62341.2024.10691683"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICLAD65226.2025.00029"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC58780.2024.10473904"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA59077.2024.00082"},{"key":"ref22","article-title":"Why can gpt learn in-context? language models implicitly perform gradient descent as meta-optimizers","author":"Dai","year":"2022","journal-title":"arXiv preprint arXiv:2212.10559"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v39i1.32016"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICRC64395.2024.10937006"},{"key":"ref25","article-title":"Masala-chai: A large-scale spice netlist dataset for analog circuits by harnessing ai","author":"Bhandari","year":"2025"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/2893356"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2992113"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2017.7926993"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2022.3206262"},{"key":"ref30","article-title":"Openroad","year":"2018"},{"key":"ref31","article-title":"Deepseek","year":"2026"},{"key":"ref32","article-title":"DeepSeek-R1: Incentivizing reasoning capability in LLMs via reinforcement learning","author":"Guo","year":"2025","journal-title":"arXiv preprint arXiv:2501.12948"},{"key":"ref33","article-title":"Claude sonnet 4.5","year":"2025"},{"key":"ref34","doi-asserted-by":"crossref","DOI":"10.1038\/s41586-025-09422-z","article-title":"DeepSeek-R1: Incentivizing reasoning capability in LLMs via reinforcement learning","author":"Guo","year":"2025","journal-title":"Nature"},{"key":"ref35","article-title":"Qwen3 technical report","author":"Team","year":"2025"}],"event":{"name":"2026 IEEE 44th VLSI Test Symposium (VTS)","location":"Napa, CA, USA","start":{"date-parts":[[2026,4,27]]},"end":{"date-parts":[[2026,4,29]]}},"container-title":["2026 IEEE 44th VLSI Test Symposium (VTS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11563061\/11563198\/11563407.pdf?arnumber=11563407","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T05:32:45Z","timestamp":1781847165000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11563407\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,4,27]]},"references-count":35,"URL":"https:\/\/doi.org\/10.1109\/vts69484.2026.11563407","relation":{},"subject":[],"published":{"date-parts":[[2026,4,27]]}}}