{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,17]],"date-time":"2026-04-17T16:35:10Z","timestamp":1776443710361,"version":"3.51.2"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"funder":[{"name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia through the Doctoral Scholarship","award":["SFRH\/BD\/78238\/2011"],"award-info":[{"award-number":["SFRH\/BD\/78238\/2011"]}]},{"name":"Instituto de Telecomunica\u00e7\u00f5es","award":["UID\/EEA\/50008\/2013"],"award-info":[{"award-number":["UID\/EEA\/50008\/2013"]}]},{"name":"INESC-ID","award":["UID\/CEC\/50021\/2013"],"award-info":[{"award-number":["UID\/CEC\/50021\/2013"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Access"],"published-print":{"date-parts":[[2017]]},"DOI":"10.1109\/access.2017.2727221","type":"journal-article","created":{"date-parts":[[2017,7,14]],"date-time":"2017-07-14T14:30:39Z","timestamp":1500042639000},"page":"14600-14615","source":"Crossref","is-referenced-by-count":20,"title":["Design Space Exploration of LDPC Decoders Using High-Level Synthesis"],"prefix":"10.1109","volume":"5","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-6078-6912","authenticated-orcid":false,"given":"Joao","family":"Andrade","sequence":"first","affiliation":[]},{"given":"Nithin","family":"George","sequence":"additional","affiliation":[]},{"given":"Kimon","family":"Karras","sequence":"additional","affiliation":[]},{"given":"David","family":"Novo","sequence":"additional","affiliation":[]},{"given":"Frederico","family":"Pratas","sequence":"additional","affiliation":[]},{"given":"Leonel","family":"Sousa","sequence":"additional","affiliation":[]},{"given":"Paolo","family":"Ienne","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9805-6747","authenticated-orcid":false,"given":"Gabriel","family":"Falcao","sequence":"additional","affiliation":[]},{"given":"Vitor","family":"Silva","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","year":"2011","journal-title":"C-to-silicon compiler high-level synthesis automated high-level synthesis for design and verification"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2010.28"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2013.2279186"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ISTC.2010.5613874"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/wicom.2011.6040195"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/CCNC.2013.6488484"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950423"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2004.1459818"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2386883"},{"key":"ref34","first-page":"273","article-title":"FPGA implementations of LDPC over GF(\n$2^{m}$\n) decoders","author":"spagnol","year":"2007","journal-title":"Proc IEEE Int Work Signal Process Syst"},{"key":"ref10","first-page":"1","article-title":"A pipelined semiparallel LDPC Decoder architecture for DVB-S2","author":"alves","year":"2013","journal-title":"Proc 3rd Workshop Circuits Syst Des (WCAS)"},{"key":"ref40","year":"2014","journal-title":"Xilinx SDAccel a unified development environment for tommorow&#x2019;s data center"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2014.6927474"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/4.987093"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.2016.7378428"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1002\/9780470740415"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.2013.6655051"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2014.6853936"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2344113"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2012.6489229"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105349"},{"key":"ref28","first-page":"215","article-title":"High-speed nb-ldpc decoder for wireless applications","author":"garc\u00eda-herrero","year":"2013","journal-title":"Proc IEEE Int Symp Intell Signal Process Commun Syst"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2015.2510381"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2047956"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1962.1057683"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1186\/1687-1499-2012-98"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7169065"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1049\/el.2013.3411"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2010.5624816"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090867"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MIM.2015.7066678"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339191"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2656207"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2012.78"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/MSP.2012.2192212"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2015.63"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2012.58"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2014.6868671"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2009.5226333"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5937927"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICASSP.2011.5946358"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2015.7293940"}],"container-title":["IEEE Access"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6287639\/7859429\/07981329.pdf?arnumber=7981329","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:30:13Z","timestamp":1641987013000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7981329\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"references-count":42,"URL":"https:\/\/doi.org\/10.1109\/access.2017.2727221","relation":{},"ISSN":["2169-3536"],"issn-type":[{"value":"2169-3536","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017]]}}}