{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T04:56:00Z","timestamp":1725425760695},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,7]]},"DOI":"10.1109\/ipfa.2009.5232645","type":"proceedings-article","created":{"date-parts":[[2009,9,9]],"date-time":"2009-09-09T19:32:52Z","timestamp":1252524772000},"page":"302-306","source":"Crossref","is-referenced-by-count":0,"title":["Influence of parasitic capacitances in modeling and analysis of advanced floating gate memory devices"],"prefix":"10.1109","author":[{"given":"Andre","family":"Moreira","sequence":"first","affiliation":[]},{"given":"Jose Machado","family":"da Silva","sequence":"additional","affiliation":[]},{"given":"Guoquiao","family":"Tao","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/16.658684"},{"key":"2","first-page":"52","article-title":"a simple and accurate method to extract neutral threshold voltage on floating gate flash devices and its application to flash reliability characterization","author":"tao","year":"2007","journal-title":"IEEE International Integrated Reliability Workshop (IRW) Final Report"},{"key":"1","first-page":"113","article-title":"a low voltage, low power, high reliable, multi-purpose, cost-competitive embedded non-volatile memory in 90nm node","author":"tao","year":"2007","journal-title":"2nd International Conference on Memory Technology and Design (ICMTD)"},{"journal-title":"Nonvolatile Semiconductor Memory Technology","year":"1998","author":"brown","key":"7"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/IPFA.2008.4588191"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/T-ED.1986.22576"},{"key":"4","article-title":"reliability of advanced embedded non-volatile memories: the 2t-fnfn device","author":"tao","year":"2008","journal-title":"Proc ICICDT"}],"event":{"name":"2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","start":{"date-parts":[[2009,7,6]]},"location":"Suzhou, Jiangsu, China","end":{"date-parts":[[2009,7,10]]}},"container-title":["2009 16th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5210717\/5232547\/05232645.pdf?arnumber=5232645","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T05:25:11Z","timestamp":1489814711000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5232645\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,7]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/ipfa.2009.5232645","relation":{},"subject":[],"published":{"date-parts":[[2009,7]]}}}