{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:25:04Z","timestamp":1740101104532,"version":"3.37.3"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,5,28]],"date-time":"2022-05-28T00:00:00Z","timestamp":1653696000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001871","name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001871","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,5,28]]},"DOI":"10.1109\/iscas48785.2022.9937879","type":"proceedings-article","created":{"date-parts":[[2022,11,11]],"date-time":"2022-11-11T20:38:08Z","timestamp":1668199088000},"page":"1585-1589","source":"Crossref","is-referenced-by-count":0,"title":["A Parasitic Resistance Extraction Tool Leveraged by Image Processing"],"prefix":"10.1109","author":[{"given":"Diogo","family":"Dias","sequence":"first","affiliation":[{"name":"NOVA University of Lisbon CTS\/UNINOVA,School of Science and Technology,Department of Electrical and Computer Engineering,Almada,Portugal"}]},{"given":"Joao","family":"Goes","sequence":"additional","affiliation":[{"name":"Delft University of Technology,Faculty of Electrical Engineering, Mathematics &#x0026; Computer Science,Department of Microelectronics,Delft,Netherlands"}]},{"given":"Tiago","family":"Costa","sequence":"additional","affiliation":[{"name":"Delft University of Technology,Faculty of Electrical Engineering, Mathematics &#x0026; Computer Science,Department of Microelectronics,Delft,Netherlands"}]}],"member":"263","reference":[{"journal-title":"Welcome to SkyWater SKY130 PDK&#x2019;s documentation! - SkyWater SKY130 PDK 0 0 0-308-gdb2e067 documentation (n d )","year":"0","key":"ref10"},{"journal-title":"Svglib PyPI (n d )","year":"0","key":"ref11"},{"key":"ref12","first-page":"265","volume":"94","author":"grambli?ka","year":"2016","journal-title":"Comparison of thinning algorithms for vectorization of engineering drawings"},{"journal-title":"Threading - thread-based parallelism threading - Thread-based parallelism - Python 3 10 0 documentation (n d )","year":"0","key":"ref13"},{"journal-title":"GeeksforGeeks","year":"2021","key":"ref14"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/EOSESD.2015.7314754"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/EDAPS.2012.6469410"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/APEMC.2012.6237966"},{"key":"ref5","first-page":"1","article-title":"Efficient multi-domain ESD analysis and verification for large SoC designs","author":"chang","year":"2011","journal-title":"EOS\/ESD Symposium Proceedings"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2020.2966699"},{"key":"ref7","first-page":"1","article-title":"EDA software for verification of metal interconnects in ESD protection networks at chip, block, and cell level","author":"ershov","year":"2013","journal-title":"2013 35th Electrical Overstress\/Electrostatic Discharge Symposium EOS\/ESD"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.5120\/ijca2015905552"},{"key":"ref1","article-title":"The Role of Post-Layout Verification in Microprocessor Design","author":"markovi?","year":"0","journal-title":"2004 Proceedings of MIPRO 2004 27th International Convention MEET & HGS"},{"journal-title":"gdspy 1 6 9 documentation","year":"0","author":"gabrielli","key":"ref9"}],"event":{"name":"2022 IEEE International Symposium on Circuits and Systems (ISCAS)","start":{"date-parts":[[2022,5,27]]},"location":"Austin, TX, USA","end":{"date-parts":[[2022,6,1]]}},"container-title":["2022 IEEE International Symposium on Circuits and Systems (ISCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9937201\/9937203\/09937879.pdf?arnumber=9937879","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,11,28]],"date-time":"2022-11-28T20:21:35Z","timestamp":1669666895000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9937879\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,5,28]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/iscas48785.2022.9937879","relation":{},"subject":[],"published":{"date-parts":[[2022,5,28]]}}}