{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,4]],"date-time":"2026-04-04T11:34:35Z","timestamp":1775302475483,"version":"3.50.1"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2013,8,1]],"date-time":"2013-08-01T00:00:00Z","timestamp":1375315200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2013,8,1]],"date-time":"2013-08-01T00:00:00Z","timestamp":1375315200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2013,8,1]],"date-time":"2013-08-01T00:00:00Z","timestamp":1375315200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Ind. Inf."],"published-print":{"date-parts":[[2013,8]]},"DOI":"10.1109\/tii.2012.2235844","type":"journal-article","created":{"date-parts":[[2012,12,21]],"date-time":"2012-12-21T14:04:37Z","timestamp":1356098677000},"page":"1625-1634","source":"Crossref","is-referenced-by-count":11,"title":["Transparent Trace-Based Binary Acceleration for Reconfigurable HW\/SW Systems"],"prefix":"10.1109","volume":"9","author":[{"given":"Jo\u00e3o","family":"Bispo","sequence":"first","affiliation":[{"name":"Departamento de Engenharia Informática, Faculdade de Engenharia da Universidade do Porto, Porto, Portugal"}]},{"given":"Nuno","family":"Paulino","sequence":"additional","affiliation":[{"name":"Faculty of Engineering, University of Porto, Porto"}]},{"given":"Jo\u00e3o M. P.","family":"Cardoso","sequence":"additional","affiliation":[{"name":"Faculty of Engineering, University of Porto, Porto"}]},{"given":"Jo\u00e3o C.","family":"Ferreira","sequence":"additional","affiliation":[{"name":"Faculty of Engineering, University of Porto, Porto"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/PACRIM.2009.5291237"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2002429"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1509288.1509294"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.240"},{"key":"ref31","year":"2003","journal-title":"Texas Instruments TMS320C64x Image\/Video Processing Library Programmer's Reference"},{"key":"ref30","author":"graphics","year":"2008","journal-title":"Catapult C Synthesis"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2011.2123901"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2010.2068303"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2009.06.002"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2011.2123908"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISOC.2007.4402489"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-008-0174-4"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.9"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.5"},{"key":"ref24","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1145\/1926367.1926374","article-title":"Binary acceleration using coarse-grained reconfigurable architecture","volume":"38","author":"paek","year":"2011","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.33"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1016\/0196-6774(84)90021-X"},{"key":"ref25","author":"leeuwen","year":"1990","journal-title":"Handbook of Theoretical Computer Science Algorithms and Complexity"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403669"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.61"},{"key":"ref21","first-page":"111","article-title":"Run-time adaptable architectures for heterogeneous behavior embedded sys-tems","author":"beck","year":"2008","journal-title":"Proc 4th Intl Workshop Appl Reconfigurable Computing (ARC'08)"},{"key":"ref28","author":"bispo","year":"2011","journal-title":"Megablock Tool Suite—Graph Extractor v0 19"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1016\/j.jcss.2004.03.004"},{"key":"ref29","author":"warren","year":"2002","journal-title":"Hacker's Delight"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2011.2173943"},{"key":"ref7","author":"alfke","year":"2009","journal-title":"Xilinx Spartan-6 FPGA User Guide Lite"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2012.2194160"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681454"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISIE.2010.5637591"},{"key":"ref6","year":"2011","journal-title":"Microblaze Processor Reference Guide v13 4"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2011.43"}],"container-title":["IEEE Transactions on Industrial Informatics"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/9424\/6582568\/06392266.pdf?arnumber=6392266","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,27]],"date-time":"2026-01-27T06:10:24Z","timestamp":1769494224000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6392266\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":31,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tii.2012.2235844","relation":{},"ISSN":["1551-3203","1941-0050"],"issn-type":[{"value":"1551-3203","type":"print"},{"value":"1941-0050","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,8]]}}}