{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T08:09:16Z","timestamp":1725437356542},"reference-count":7,"publisher":"SPIE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,3,13]]},"DOI":"10.1117\/12.2083099","type":"proceedings-article","created":{"date-parts":[[2015,3,13]],"date-time":"2015-03-13T15:31:16Z","timestamp":1426260676000},"page":"94030M","source":"Crossref","is-referenced-by-count":0,"title":["Power noise rejection and device noise analysis at the reference level of ramp ADC"],"prefix":"10.1117","volume":"9403","author":[{"given":"Peter","family":"Ahn","sequence":"additional","affiliation":[]},{"given":"JiYong","family":"Um","sequence":"additional","affiliation":[]},{"given":"EunJung","family":"Choi","sequence":"additional","affiliation":[]},{"given":"HyunMook","family":"Park","sequence":"additional","affiliation":[]},{"given":"JaSeung","family":"Gou","sequence":"additional","affiliation":[]},{"given":"KwangJun","family":"Cho","sequence":"additional","affiliation":[]},{"given":"KangBong","family":"Seo","sequence":"additional","affiliation":[]},{"given":"SangDong","family":"Yoo","sequence":"additional","affiliation":[]}],"member":"189","reference":[{"key":"c1","first-page":"268","article-title":"A 0.1e- vertical FPN 4.7e- read noise 71dB DR CMOS image sensor with 13b column-parallel single-ended cyclic ADCs","author":"Park","year":"2009"},{"key":"c2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2012.2220364"},{"key":"c3","first-page":"304","article-title":"An integrated 800\/spl times\/600 CMOS imaging system","author":"Yang","year":"1999"},{"key":"c4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2204475"},{"key":"c5","unstructured":"Razavi, B., [Design of Analog CMOS Integrated Circuits], McGraw-Hill, New York, 201\u2013245 (2001)."},{"key":"c6","unstructured":"Gray, P. R., Hurst, P. J., Lewis, S. H.and Meyer, R. G., [ANALYSIS AND DESIGN OF ANALOG INTEGFRATED CIRCUITS], John Wiley & Sons, New York, 748\u2013805 (2001)."},{"key":"c7","doi-asserted-by":"publisher","DOI":"10.1109\/TCS.1986.1085840"}],"event":{"name":"IS&T\/SPIE Electronic Imaging","location":"San Francisco, California, United States"},"container-title":["SPIE Proceedings","Image Sensors and Imaging Systems 2015"],"original-title":[],"deposited":{"date-parts":[[2018,10,2]],"date-time":"2018-10-02T18:27:03Z","timestamp":1538504823000},"score":1,"resource":{"primary":{"URL":"http:\/\/proceedings.spiedigitallibrary.org\/proceeding.aspx?doi=10.1117\/12.2083099"}},"subtitle":[],"editor":[{"given":"Ralf","family":"Widenhorn","sequence":"first","affiliation":[]},{"given":"Antoine","family":"Dupret","sequence":"additional","affiliation":[]}],"short-title":[],"issued":{"date-parts":[[2015,3,13]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1117\/12.2083099","relation":{},"ISSN":["0277-786X"],"issn-type":[{"type":"print","value":"0277-786X"}],"subject":[],"published":{"date-parts":[[2015,3,13]]}}}