{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T21:27:59Z","timestamp":1648675679881},"reference-count":0,"publisher":"World Scientific Pub Co Pte Lt","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int. J. High Speed Comp."],"published-print":{"date-parts":[[1995,9]]},"DOI":"10.1142\/s0129053395000233","type":"journal-article","created":{"date-parts":[[2004,11,12]],"date-time":"2004-11-12T11:59:25Z","timestamp":1100260765000},"page":"421-443","source":"Crossref","is-referenced-by-count":0,"title":["MEMORY SYSTEM DESIGN IN SUPERSCALAR PROCESSING"],"prefix":"10.1142","volume":"07","author":[{"given":"NENG-PIN","family":"LU","sequence":"first","affiliation":[]},{"given":"CHUNG-PING","family":"CHUNG","sequence":"additional","affiliation":[]}],"member":"219","container-title":["International Journal of High Speed Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0129053395000233","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,12,2]],"date-time":"2016-12-02T03:30:50Z","timestamp":1480649450000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0129053395000233"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,9]]},"references-count":0,"journal-issue":{"issue":"03","published-print":{"date-parts":[[1995,9]]}},"alternative-id":["10.1142\/S0129053395000233"],"URL":"https:\/\/doi.org\/10.1142\/s0129053395000233","relation":{},"ISSN":["0129-0533"],"issn-type":[{"value":"0129-0533","type":"print"}],"subject":[],"published":{"date-parts":[[1995,9]]}}}