{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T13:25:58Z","timestamp":1742390758433},"reference-count":0,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Parallel Process. Lett."],"published-print":{"date-parts":[[1995,12]]},"abstract":"<jats:p> The goal of a task graph partitioning and mapping strategy is to reduce the communication overhead in a parallel application. Much of the past work in this area has been in the context of a static network topology. Here we show that the flexibility provided by a reconfigurable network can help lower the overhead and provide additional performance gains. However, since a reconfigurable network can be set to many different topologies, a new approach for the mapping problem must be formulated. Our research is based on the Interconnection Cached Network (ICN) a prototype of which is currently under development. The ICN is a reconfigurable network suited for exploiting switching locality in applications. \"Switching locality\" refers to the phenomenon in parallel applications of having each task mostly communicating (switching) between a small set of other tasks. As evidenced by the sparse nature of most task graphs, this phenomenon is common to many parallel applications. We describe the ICN architecture, the problem of mapping task graphs in the ICN, and the performance advantages of complementing clever partitioning strategies with topology reconfiguration. <\/jats:p>","DOI":"10.1142\/s0129626495000503","type":"journal-article","created":{"date-parts":[[2004,11,10]],"date-time":"2004-11-10T11:14:37Z","timestamp":1100085277000},"page":"563-574","source":"Crossref","is-referenced-by-count":2,"title":["TASK GRAPH PARTITIONING AND MAPPING IN A RECONFIGURABLE PARALLEL ARCHITECTURE"],"prefix":"10.1142","volume":"05","author":[{"given":"VIPUL","family":"GUPTA","sequence":"first","affiliation":[{"name":"Dept. of Computer Science, State University of New York, Binghamton, NY 13902-6000, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"EUGEN","family":"SCHENFELD","sequence":"additional","affiliation":[{"name":"NEC Research Institute, Inc., 4 Independence Way, Princeton, NJ 08540, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"container-title":["Parallel Processing Letters"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0129626495000503","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T13:33:14Z","timestamp":1565184794000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0129626495000503"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,12]]},"references-count":0,"journal-issue":{"issue":"04","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[1995,12]]}},"alternative-id":["10.1142\/S0129626495000503"],"URL":"https:\/\/doi.org\/10.1142\/s0129626495000503","relation":{},"ISSN":["0129-6264","1793-642X"],"issn-type":[{"value":"0129-6264","type":"print"},{"value":"1793-642X","type":"electronic"}],"subject":[],"published":{"date-parts":[[1995,12]]}}}