{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T08:10:36Z","timestamp":1767168636271,"version":"build-2238731810"},"reference-count":9,"publisher":"World Scientific Pub Co Pte Ltd","issue":"05n06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2000,10]]},"abstract":"<jats:p>This letter describes a motion estimation architecture with complementary access types of memory banks, one for column vector access and the other for row vector access. It handles 2D image very efficiently for full-search block matching algorithm and maximizes a useful data transfer rate by reducing the overhead clocks for extra data reading and alignment. The results show that power saving is improved by using complementary access types of memory banks and amounts to 27.3% when the full-search block matching algorithm is applied for the CCIR-601 format compared to an identical design without the proposed enhancements.<\/jats:p>","DOI":"10.1142\/s0218126600000184","type":"journal-article","created":{"date-parts":[[2003,5,16]],"date-time":"2003-05-16T05:24:33Z","timestamp":1053062673000},"page":"229-237","source":"Crossref","is-referenced-by-count":0,"title":["LOW-POWER 2D MOTION ESTIMATION ARCHITECTURE WITH COMPLEMENTARY EMBEDDED MEMORY BANKS"],"prefix":"10.1142","volume":"10","author":[{"given":"KYUNG-SAENG","family":"KIM","sequence":"first","affiliation":[{"name":"Dept. of EECS, Korea Advanced Institute of Science and Technology, 373-1 Kusong-dong, Yusong-gu, Taejon, 305-701, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"KWYRO","family":"LEE","sequence":"additional","affiliation":[{"name":"Dept. of EECS, Korea Advanced Institute of Science and Technology, 373-1 Kusong-dong, Yusong-gu, Taejon, 305-701, Republic of Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2012,4,30]]},"reference":[{"key":"p_1","doi-asserted-by":"publisher","DOI":"10.1109\/76.554414"},{"key":"p_2","first-page":"12","volume":"30","author":"Ishihara K.","year":"1995","journal-title":"IEEE J. Solid-State Circuits"},{"key":"p_3","first-page":"11","volume":"31","author":"Lin H.-D.","year":"1996","journal-title":"IEEE J. Solid-State Circuits"},{"key":"p_4","doi-asserted-by":"publisher","DOI":"10.1109\/76.709406"},{"key":"p_5","doi-asserted-by":"publisher","DOI":"10.1109\/4.641704"},{"key":"p_6","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"p_7","first-page":"712","author":"Tzeng G.-L.","year":"1995","journal-title":"Proc. IEEE ISCAS"},{"key":"p_8","first-page":"5","volume":"5","author":"Vos L. D.","year":"1995","journal-title":"IEEE Trans. Circuits Syst. Video Technol."},{"key":"p_9","first-page":"9","volume":"31","author":"Kong B.-S.","year":"1996","journal-title":"IEEE J. Solid-State Circuits"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126600000184","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T10:18:54Z","timestamp":1565173134000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126600000184"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000,10]]},"references-count":9,"aliases":["10.1016\/s0218-1266(00)00018-4"],"journal-issue":{"issue":"05n06","published-online":{"date-parts":[[2012,4,30]]},"published-print":{"date-parts":[[2000,10]]}},"alternative-id":["10.1142\/S0218126600000184"],"URL":"https:\/\/doi.org\/10.1142\/s0218126600000184","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2000,10]]}}}