{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,11,28]],"date-time":"2022-11-28T21:49:42Z","timestamp":1669672182615},"reference-count":17,"publisher":"World Scientific Pub Co Pte Lt","issue":"03","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2002,6]]},"abstract":"<jats:p> A strategy to enhance the speed and power characteristics of an industrial circuit is demonstrated in this paper. It is shown that nonzero clock skew scheduling can improve circuit performance while relaxing the strict timing constraints of the critical data paths within a high speed system. A software tool implementing a nonzero clock skew scheduling algorithm is described together with a methodology that generates the required clock signal delays. Furthermore, a technique that significantly reduces the power dissipated in the noncritical data paths is demonstrated. The application of this technique combined with nonzero clock skew scheduling to the slower data paths is also described. Speed improvements of up to 18% and power savings greater than 80% are achieved in certain functional blocks of an industrial high performance microprocessor. <\/jats:p>","DOI":"10.1142\/s0218126602000410","type":"journal-article","created":{"date-parts":[[2002,10,1]],"date-time":"2002-10-01T16:07:50Z","timestamp":1033488470000},"page":"231-245","source":"Crossref","is-referenced-by-count":2,"title":["DEMONSTRATION OF SPEED AND POWER ENHANCEMENTS ON AN INDUSTRIAL CIRCUIT THROUGH APPLICATION OF CLOCK SKEW SCHEDULING"],"prefix":"10.1142","volume":"11","author":[{"given":"D.","family":"VELENIS","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer  Engineering, University of Rochester, Rochester, New York 14627, USA"}]},{"given":"K. T.","family":"TANG","sequence":"additional","affiliation":[{"name":"Broadcom Corporation, 2099 Gateway Place, San Jose, California 95110, USA"}]},{"given":"I. S.","family":"KOURTEV","sequence":"additional","affiliation":[{"name":"Department of Electrical Engineering,  University of Pittsburgh, Pittsburgh, Pennsylvania 15261, USA"}]},{"given":"V.","family":"ADLER","sequence":"additional","affiliation":[{"name":"Sun Microsystems, 901 San Antonio Road, Palo Alto, California 94303, USA"}]},{"given":"F.","family":"BAEZ","sequence":"additional","affiliation":[{"name":"Intel Corporation, 2200 Mision College  Boulevard, Santa Clara, California 95052, USA"}]},{"given":"E. G.","family":"FRIEDMAN","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer  Engineering, University of Rochester, Rochester, New York 14627, USA"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"p_2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1986.1052510"},{"key":"p_3","first-page":"118","author":"Bakoglou H. B.","year":"1986","journal-title":"Proc. IEEE Int. Conf. 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