{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,2]],"date-time":"2022-04-02T03:45:26Z","timestamp":1648871126024},"reference-count":40,"publisher":"World Scientific Pub Co Pte Lt","issue":"05","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2002,10]]},"abstract":"<jats:p> We present a modular platform simulation environment to estimate the energy consumption and performance of distributed systems in a Systems-on-Chip context. We use the simulation environment to support the development of our high-level design methodologies. More in particular, we steer and verify the development of a task-level data transfer and storage methodology, the development of a task-level scheduling methodology and the development of an instruction memory management methodology. All of these methodologies are focussed on reducing the overall energy consumption of the complex dynamic system on a heterogeneous platform architecture. Compared to research in the academic and industrial context, our contribution is to integrate in a scalable way existing energy and performance simulators of the components of a heterogeneous multiprocessor SoC. Also a novel instruction memory hierarchy is included. The simulation environment consists of multiple processing nodes connected to a distributed memory hierarchy. To reduce the energy consumption of the system, both the processing nodes as well as the memory architecture can be varied: the processing voltage of each node can be tuned and the memory hierarchy can be fully customized. The integration of dynamic real-time applications on this platform is simplified by the availability of a multi-processor RTOS. The use of the simulator to develop our high-level design methodologies is illustrated on real-life multimedia applications. <\/jats:p>","DOI":"10.1142\/s0218126602000598","type":"journal-article","created":{"date-parts":[[2002,11,14]],"date-time":"2002-11-14T09:58:21Z","timestamp":1037267901000},"page":"503-535","source":"Crossref","is-referenced-by-count":4,"title":["MATADOR: AN EXPLORATION ENVIRONMENT FOR SYSTEM-DESIGN"],"prefix":"10.1142","volume":"11","author":[{"given":"PAUL","family":"MARCHAL","sequence":"first","affiliation":[{"name":"ESAT-INSYS\/D6, KUL\/IMEC, Kapeldreef 75,  Heverlee, 3001, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"MURALI","family":"JAYAPALA","sequence":"additional","affiliation":[{"name":"ACCA, ESAT, KUL, Heverlee, 3001, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"SAMUEL XAVIER","family":"DE SOUZA","sequence":"additional","affiliation":[{"name":"D6, IMEC, Kapeldreef 75, Heverlee,  3001, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"PENG","family":"YANG","sequence":"additional","affiliation":[{"name":"ESAT-INSYS\/D6, KUL\/IMEC, Kapeldreef 75,  Heverlee, 3001, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"FRANCKY","family":"CATTHOOR","sequence":"additional","affiliation":[{"name":"ESAT-INSYS\/D6, KUL\/IMEC, Kapeldreef 75,  Heverlee, 3001, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G.","family":"DECONINCK","sequence":"additional","affiliation":[{"name":"ACCA, ESAT, KUL, Heverlee, 3001, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"p_1","first-page":"22","author":"Claasen T.","year":"1995","journal-title":"Proc. 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