{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,3]],"date-time":"2022-04-03T19:51:41Z","timestamp":1649015501458},"reference-count":11,"publisher":"World Scientific Pub Co Pte Lt","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2002,12]]},"abstract":"<jats:p> In current microprocessor designs, power dissipation has become a first class design constraint alongside performance and total chip cost. In order to design power efficient microprocessors, it is essential for architects to estimate the power\/energy consumption and study thermal effects early on in the design process. This paper describes a method that can be used to study power\/performance tradeoffs during the microarchitecture definition phase. The modeling and simulation methods provide an integrated framework for evaluating the effects of microarchitectural parameters on performance, power and thermal behavior. The method also provides a flexible interface for supporting several power and thermal models of varying degrees of detail. The paper introduces a tool based on this method that can be used to systematically study new architectures, designs and optimize them for power and\/or performance. The tool also has a flexible interface which is to be easily extended for future power\/performance analysis and optimization techniques. <\/jats:p>","DOI":"10.1142\/s0218126602000677","type":"journal-article","created":{"date-parts":[[2003,4,11]],"date-time":"2003-04-11T05:29:32Z","timestamp":1050038972000},"page":"659-675","source":"Crossref","is-referenced-by-count":0,"title":["INTEGRATED PERFORMANCE, POWER, AND THERMAL MODELING"],"prefix":"10.1142","volume":"11","author":[{"given":"GEORGE","family":"CAI","sequence":"first","affiliation":[{"name":"Intel Corporation, MS JF411, 2111 NE 25th Ave., Hillsboro, OR 97124, USA"}]},{"given":"ASHUTOSH S.","family":"DHODAPKAR","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Wisconsin-Madison, 1415 Engineering Drive, Madison, WI 53706, USA"}]},{"given":"JAMES E.","family":"SMITH","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Wisconsin-Madison, 1415 Engineering Drive, Madison, WI 53706, USA"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"p_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.917539"},{"key":"p_2","first-page":"3","author":"Gonzales R.","year":"1995","journal-title":"Proc. Int. Symp. Low-Power Electron. Design"},{"key":"p_3","doi-asserted-by":"publisher","DOI":"10.1147\/rd.462.0213"},{"key":"p_4","doi-asserted-by":"publisher","DOI":"10.1109\/16.661223"},{"key":"p_5","first-page":"726","author":"Gowan M. K.","year":"1998","journal-title":"35th Design Automation Conf."},{"key":"p_8","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.1996.547497"},{"key":"p_9","first-page":"Q398","author":"Thompson S.","year":"1998","journal-title":"Intel Technol. J."},{"key":"p_10","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.1994.573197"},{"key":"p_12","doi-asserted-by":"publisher","DOI":"10.1109\/43.503928"},{"key":"p_22","first-page":"6","volume":"29","author":"Liu D.","year":"1994","journal-title":"IEEE J. Solid-State Circuits"},{"key":"p_30","doi-asserted-by":"publisher","DOI":"10.1145\/280756.280943"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126602000677","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T23:45:16Z","timestamp":1565135116000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126602000677"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,12]]},"references-count":11,"journal-issue":{"issue":"06","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2002,12]]}},"alternative-id":["10.1142\/S0218126602000677"],"URL":"https:\/\/doi.org\/10.1142\/s0218126602000677","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2002,12]]}}}