{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,3]],"date-time":"2022-04-03T22:45:12Z","timestamp":1649025912641},"reference-count":9,"publisher":"World Scientific Pub Co Pte Lt","issue":"02","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2003,4]]},"abstract":"<jats:p> In this paper, a low-power design for the Reed\u2013Solomon (RS) decoder is presented. Our approach includes a novel two-stage syndrome calculator that reduces the syndrome computations by one-half, a modified Berlekamp\u2013Massey algorithm in the key equation solver and a terminated mechanism in the Chien search circuit. The test chip for (255,239) and (208,192) RS decoders are implemented by 0.25 \u03bcm CMOS 1P5M and 0.35 \u03bcm CMOS SPQM standard cells, respectively. Simulation results show our approach can work successfully and achieved large reduction of power consumption on the average. <\/jats:p>","DOI":"10.1142\/s0218126603000726","type":"journal-article","created":{"date-parts":[[2003,7,18]],"date-time":"2003-07-18T10:51:20Z","timestamp":1058525480000},"page":"159-170","source":"Crossref","is-referenced-by-count":0,"title":["A Low-Power Design for Reed\u2013Solomon Decoders"],"prefix":"10.1142","volume":"12","author":[{"given":"Hsie-Chia","family":"Chang","sequence":"first","affiliation":[{"name":"Department of Electronics Engineering,  National Chiao Tung University, Hsinchu, Taiwan, 300, Republic of China"}]},{"given":"Chen-Yi","family":"Lee","sequence":"additional","affiliation":[{"name":"Department of Electronics Engineering,  National Chiao Tung University, Hsinchu, Taiwan, 300, Republic of China"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf1","volume-title":"Theory and Practice of Error Control Codes","author":"Blahut R.","year":"1983"},{"key":"rf2","volume-title":"Algebraic Coding Theory","author":"Berlekamp E.","year":"1968"},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1137\/0109020"},{"key":"rf5","doi-asserted-by":"crossref","first-page":"122","DOI":"10.1109\/TIT.1969.1054260","volume":"15","author":"Massey J.","journal-title":"IEEE Trans. Inform. Theor."},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1016\/S0019-9958(75)90090-X"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20000785"},{"key":"rf8","first-page":"153","volume":"42","author":"McEliece R. J.","journal-title":"The Telecommunications and Data Acquisition Progress Report"},{"key":"rf9","doi-asserted-by":"crossref","first-page":"549","DOI":"10.1109\/TIT.1965.1053825","volume":"11","author":"Forney G.","journal-title":"IEEE Trans. Inform. Theor."},{"key":"rf10","doi-asserted-by":"publisher","DOI":"10.1109\/4.902763"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126603000726","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T17:58:47Z","timestamp":1565200727000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126603000726"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003,4]]},"references-count":9,"journal-issue":{"issue":"02","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2003,4]]}},"alternative-id":["10.1142\/S0218126603000726"],"URL":"https:\/\/doi.org\/10.1142\/s0218126603000726","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2003,4]]}}}