{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T11:18:47Z","timestamp":1648639127449},"reference-count":2,"publisher":"World Scientific Pub Co Pte Lt","issue":"06","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2005,12]]},"abstract":"<jats:p> Many of the new high-speed high-integration density Integrated Circuits (ICs) and future generation of microprocessor powering requirements can be successfully achieved with voltage-mode hysteretic control applied to interleaved multiphase Point-of-Load (POL) DC\u2013DC converters or Voltage Regulator Modules (VRMs). This is because of the several advantages that can be achieved by combining the advantages of hysteretic control and interleaving. However, there are several challenges in combining the two techniques, the most prominent being the current sharing and equalization between the interleaved phases. In this communication, we present a solution based on a real-time DSP controller. Challenges of the implementation will be discussed and experimental results obtained from a prototype will be presented. <\/jats:p>","DOI":"10.1142\/s0218126605002829","type":"journal-article","created":{"date-parts":[[2006,2,27]],"date-time":"2006-02-27T04:58:44Z","timestamp":1141016324000},"page":"1073-1084","source":"Crossref","is-referenced-by-count":5,"title":["DSP-CONTROLLED MULTIPHASE HYSTERETIC VRM WITH CURRENT SHARING EQUALIZATION"],"prefix":"10.1142","volume":"14","author":[{"given":"JABER","family":"ABU-QAHOUQ","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"NATORN","family":"PONGRATANANUKUL","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"TAKIS","family":"KASPARIS","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"ISSA","family":"BATARSEH","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL 32816, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/63.892830"},{"key":"rf11","doi-asserted-by":"publisher","DOI":"10.1109\/6040.938289"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126605002829","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T23:43:59Z","timestamp":1565135039000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126605002829"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005,12]]},"references-count":2,"journal-issue":{"issue":"06","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2005,12]]}},"alternative-id":["10.1142\/S0218126605002829"],"URL":"https:\/\/doi.org\/10.1142\/s0218126605002829","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2005,12]]}}}