{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T12:15:31Z","timestamp":1648556131460},"reference-count":10,"publisher":"World Scientific Pub Co Pte Lt","issue":"02","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2007,4]]},"abstract":"<jats:p> The Residue Number System (RNS) is an integer system appropriate for implementing fast digital signal processors. It can be used for supporting high-speed arithmetic by operating in parallel channels without need for exchanging information among the channels. In this paper, two novel RNS are proposed. First, a new RNS system based on the modulus set {2<jats:sup>n+1<\/jats:sup>, 2<jats:sup>n<\/jats:sup> - 1, 2<jats:sup>n<\/jats:sup> + 1, 2<jats:sup>n<\/jats:sup> + 2<jats:sup>(n+1)\/2<\/jats:sup> + 1, 2<jats:sup>n<\/jats:sup> - 2<jats:sup>(n+1)\/2<\/jats:sup> + 1}, n odd, is developed, along with an efficient implementation of its residue-to-weighted converter. The new RNS is a balanced five-modulus system, appropriate for large dynamic ranges. The proposed residue-to-binary converter is fast and hardware efficient and is based on a one's complement multi-operand adder that adds operands of size only 80% of the size dictated by the system's dynamic range. Second, a new class of multi-modulus RNS systems is proposed. These systems are based on sets consisting of two groups of moduli with the modulus product within one group being of the form 2<jats:sup>a<\/jats:sup>(2<jats:sup>b<\/jats:sup> - 1), while the modulus product within the other group is of the form 2<jats:sup>c<\/jats:sup> - 1. Their RNS-to-weighted converters are based on efficient combinations of the Chinese Remainder Theorem and Mixed Radix Conversion decoding techniques. Systems based on four, five, and seven moduli are constructed and analyzed. The new systems allow efficient implementations for their RNS-to-weighted decoders, imply fast and balanced RNS arithmetic, and may achieve large dynamic ranges. The presented residue-to-weighted converters for these systems rely on simple mod (2<jats:sup>x<\/jats:sup> - 1) hardware, which can be easily implemented as one's complement hardware. <\/jats:p>","DOI":"10.1142\/s0218126607003666","type":"journal-article","created":{"date-parts":[[2007,7,11]],"date-time":"2007-07-11T10:27:00Z","timestamp":1184149620000},"page":"267-286","source":"Crossref","is-referenced-by-count":4,"title":["LARGE DYNAMIC RANGE RNS SYSTEMS AND THEIR RESIDUE TO BINARY CONVERTERS"],"prefix":"10.1142","volume":"16","author":[{"given":"ALEXANDER","family":"SKAVANTZOS","sequence":"first","affiliation":[{"name":"Department of Electrical and Computer Engineering, Louisiana State University, Baton Rouge, LA 70803, USA"}]},{"given":"MOHAMMAD","family":"ABDALLAH","sequence":"additional","affiliation":[{"name":"Intel Corporation, Folsom, CA 95630, USA"}]},{"given":"THANOS","family":"STOURAITIS","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, University of Patras, 26110, Greece"}]}],"member":"219","published-online":{"date-parts":[[2012,1,25]]},"reference":[{"key":"rf1","volume-title":"Residue Number System Arithmetic: Modern Applications in Digital Signal Processing","author":"Soderstrand M. A.","year":"1986"},{"key":"rf2","doi-asserted-by":"crossref","first-page":"191","DOI":"10.1109\/TCS.1977.1084321","volume":"24","author":"Jenkins W. K.","journal-title":"IEEE Trans. Circuits Syst."},{"key":"rf3","doi-asserted-by":"publisher","DOI":"10.1049\/el:19911325"},{"key":"rf4","doi-asserted-by":"publisher","DOI":"10.1109\/82.404073"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20010202"},{"key":"rf8","doi-asserted-by":"publisher","DOI":"10.1109\/82.471401"},{"key":"rf10","doi-asserted-by":"publisher","DOI":"10.1109\/82.298378"},{"key":"rf11","doi-asserted-by":"publisher","DOI":"10.1109\/78.747787"},{"key":"rf12","volume-title":"Elementary Number Theory and its Applications","author":"Rosen K. H.","year":"1985"},{"key":"rf13","volume-title":"Computer Arithmetic","author":"Hwang K.","year":"1979"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126607003666","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T03:41:54Z","timestamp":1565149314000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126607003666"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,4]]},"references-count":10,"journal-issue":{"issue":"02","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2007,4]]}},"alternative-id":["10.1142\/S0218126607003666"],"URL":"https:\/\/doi.org\/10.1142\/s0218126607003666","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,4]]}}}