{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,26]],"date-time":"2025-09-26T13:13:29Z","timestamp":1758892409745},"reference-count":3,"publisher":"World Scientific Pub Co Pte Lt","issue":"04","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2007,8]]},"abstract":"<jats:p> Optimized implementation of computationally intensive cryptographic transformation is an area of active research, mainly focused on Advanced Encryption Standard (AES). Byte substitution implemented using substitution boxes (S-boxes), is the main transformation in AES which strains the enabling embedded platform, e.g., Field Programmable Gate Arrays. We represent a novel clocking technique enabling optimized implementation of Byte Substitution that enhances processing speed and reduces the area required for S-boxes on Xilinx FPGA Block RAM (BRAM). <\/jats:p>","DOI":"10.1142\/s0218126607003873","type":"journal-article","created":{"date-parts":[[2007,12,11]],"date-time":"2007-12-11T11:08:12Z","timestamp":1197371292000},"page":"603-611","source":"Crossref","is-referenced-by-count":11,"title":["MEMORY EFFICIENT IMPLEMENTATION OF AES S-BOXES ON FPGA"],"prefix":"10.1142","volume":"16","author":[{"given":"ARSHAD","family":"AZIZ","sequence":"first","affiliation":[{"name":"Electrical Engineering Department, National University of Sciences and Technology (NUST), Habib Rehmatullah Road, Karachi-75350, Pakistan"}]},{"given":"NASSAR","family":"IKRAM","sequence":"additional","affiliation":[{"name":"Electrical Engineering Department, National University of Sciences and Technology (NUST), Habib Rehmatullah Road, Karachi-75350, Pakistan"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf2","volume-title":"The Design of Rijndael, AES \u2014 The Advance Encryption Standard","author":"Daemen J.","year":"2002"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1023\/A:1023252403567"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/92.931230"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126607003873","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T17:56:20Z","timestamp":1565200580000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126607003873"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,8]]},"references-count":3,"journal-issue":{"issue":"04","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2007,8]]}},"alternative-id":["10.1142\/S0218126607003873"],"URL":"https:\/\/doi.org\/10.1142\/s0218126607003873","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,8]]}}}