{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,31]],"date-time":"2022-03-31T13:04:25Z","timestamp":1648731865964},"reference-count":5,"publisher":"World Scientific Pub Co Pte Lt","issue":"05","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2007,10]]},"abstract":"<jats:p> This paper presents an efficient and accurate approach to calculate effective capacitances in the presence of RC interconnect loads. In the precharacterization process, the gate model is selected such that the output of the model matches both the delay and the shape of the real gate response. To determine the effective capacitance, a novel algorithm is developed to efficiently and accurately calculate the propagation delay from circuit elements. This algorithm requires at most two iterations to obtain effective capacitances that produce gate delays within 4% of HSPICE results. This is at most half the time required by the currently used method to calculate effective capacitances. <\/jats:p>","DOI":"10.1142\/s0218126607003897","type":"journal-article","created":{"date-parts":[[2008,3,25]],"date-time":"2008-03-25T08:05:59Z","timestamp":1206432359000},"page":"791-800","source":"Crossref","is-referenced-by-count":0,"title":["AN ACCURATE LOW-ITERATION ALGORITHM FOR EFFECTIVE CAPACITANCE COMPUTATION"],"prefix":"10.1142","volume":"16","author":[{"given":"SHIZHONG","family":"MEI","sequence":"first","affiliation":[{"name":"Micron Technology, Inc., 8000 S Federal Way, Boise, ID 83707, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"YEHEA I.","family":"ISMAIL","sequence":"additional","affiliation":[{"name":"Electrical Engineering and Computer Science, 2145 Sheridan Road, Evanston, IL 60208, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1109\/43.331409"},{"key":"rf2","doi-asserted-by":"publisher","DOI":"10.1109\/43.506141"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1983.1051966"},{"key":"rf9","doi-asserted-by":"publisher","DOI":"10.1109\/43.16802"},{"key":"rf11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.829795"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126607003897","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,6]],"date-time":"2019-08-06T23:42:56Z","timestamp":1565134976000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126607003897"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,10]]},"references-count":5,"journal-issue":{"issue":"05","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2007,10]]}},"alternative-id":["10.1142\/S0218126607003897"],"URL":"https:\/\/doi.org\/10.1142\/s0218126607003897","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,10]]}}}