{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T21:13:14Z","timestamp":1649106794598},"reference-count":7,"publisher":"World Scientific Pub Co Pte Lt","issue":"05","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["J CIRCUIT SYST COMP"],"published-print":{"date-parts":[[2007,10]]},"abstract":"<jats:p> Performance-enhancement techniques improve CPU speed at the cost of other valuable system resources such as power and energy. Software prefetching is one such technique, tolerating memory latency for high performance. In this article, we quantitatively study this technique's impact on system performance and power\/energy consumption. First, we demonstrate that software prefetching achieves an average of 36% performance improvement with 8% additional energy consumption and 69% higher power consumption on six memory-intensive benchmarks. Then we combine software prefetching with a (unrealistic) static voltage scaling technique to show that this performance gain can be converted to an average of 48% energy saving. This suggests that it is promising to build low power systems with techniques traditionally known for performance enhancement. We thus propose a practical online profiling based dynamic voltage scaling (DVS) algorithm. The algorithm monitors system's performance and adapts the voltage level accordingly to save energy while maintaining the observed system performance. Our proposed online profiling DVS algorithm achieves 38% energy saving without any significant performance loss. <\/jats:p>","DOI":"10.1142\/s0218126607003964","type":"journal-article","created":{"date-parts":[[2008,3,25]],"date-time":"2008-03-25T12:05:59Z","timestamp":1206446759000},"page":"745-767","source":"Crossref","is-referenced-by-count":0,"title":["LOW POWER SYSTEM DESIGN BY COMBINING SOFTWARE PREFETCHING AND DYNAMIC VOLTAGE SCALING"],"prefix":"10.1142","volume":"16","author":[{"given":"SUMITKUMAR N.","family":"PAMNANI","sequence":"first","affiliation":[{"name":"Microprocessor Verification, AMD, M\/S \u2014 615, 5204 East Ben White Blvd, Austin, TX 78741, USA"}]},{"given":"DEEPAK N.","family":"AGARWAL","sequence":"additional","affiliation":[{"name":"Microprocessor Verification, AMD, M\/S \u2014 615, 5204 East Ben White Blvd, Austin, TX 78741, USA"}]},{"given":"GANG","family":"QU","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering Department, and Institute for Advanced Computer Study, University of Maryland, College Park, MD 20742, USA"}]},{"given":"DONALD","family":"YEUNG","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering Department, and Institute for Advanced Computer Study, University of Maryland, College Park, MD 20742, USA"}]}],"member":"219","published-online":{"date-parts":[[2011,11,21]]},"reference":[{"key":"rf1","doi-asserted-by":"publisher","DOI":"10.1145\/216585.216588"},{"key":"rf2","doi-asserted-by":"publisher","DOI":"10.1109\/12.381947"},{"key":"rf5","doi-asserted-by":"publisher","DOI":"10.1145\/273011.273021"},{"key":"rf6","doi-asserted-by":"publisher","DOI":"10.1016\/0743-7315(91)90014-Z"},{"key":"rf7","doi-asserted-by":"publisher","DOI":"10.1109\/92.645070"},{"key":"rf26","first-page":"869","volume":"13","author":"Hua S.","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"rf33","first-page":"54","volume":"18","author":"Lorch J.","journal-title":"Micro"}],"container-title":["Journal of Circuits, Systems and Computers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/www.worldscientific.com\/doi\/pdf\/10.1142\/S0218126607003964","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,8,7]],"date-time":"2019-08-07T03:42:54Z","timestamp":1565149374000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.worldscientific.com\/doi\/abs\/10.1142\/S0218126607003964"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,10]]},"references-count":7,"journal-issue":{"issue":"05","published-online":{"date-parts":[[2011,11,21]]},"published-print":{"date-parts":[[2007,10]]}},"alternative-id":["10.1142\/S0218126607003964"],"URL":"https:\/\/doi.org\/10.1142\/s0218126607003964","relation":{},"ISSN":["0218-1266","1793-6454"],"issn-type":[{"value":"0218-1266","type":"print"},{"value":"1793-6454","type":"electronic"}],"subject":[],"published":{"date-parts":[[2007,10]]}}}